Two-Stage Processor Voice Command System to Reduce Power Consumption
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Solution Overview
Problem
Current computerized devices, such as smartphones and IoT devices, face challenges in implementing voice command capabilities due to the high computational requirements and power consumption of voice recognition models, which result in increased waste heat and latency, making it costly and inefficient to provide reliable voice command inputs.
Innovation Solution
A two-stage processor system is employed, where a low-power processor executes a loose wake word recognition model to detect the wake word, and upon detection, switches to a more powerful processor to verify the wake word using a tighter model, reducing overall power consumption and waste heat while maintaining low false rejection and acceptance rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-powered processor is used to execute voice recognition models, then voice recognition accuracy is improved, but power consumption and waste heat increase significantly
Solution Approach 1:
The voice recognition system is divided into two separate processors: a first processor that continuously executes a computationally simple wake word detection model, and a second processor that executes a more accurate but computationally intensive voice recognition model only when needed. This segmentation allows the system to maintain high recognition accuracy while significantly reducing average power consumption by keeping the powerful second processor in a low-power state most of the time.
2Reliability
If a high-powered processor is used to execute voice recognition models, then voice recognition accuracy is improved, but device cost increases
Solution Approach 1:
The system segments voice recognition functionality across two processors with different capabilities. The first processor handles continuous wake word detection with simple algorithms, while the second processor with higher computational power is only activated intermittently for accurate voice recognition. This approach allows the use of a less expensive first processor that would be insufficient if it had to handle full voice recognition alone, while the expensive second processor is utilized sparingly, optimizing overall system cost.
3Reliability
If continuous execution of tight voice recognition model is performed, then false rejection rate is reduced, but processing time and power consumption increase
Solution Approach 1:
The first processor continuously performs preliminary wake word detection using a simple, fast algorithm. When the wake word is detected, this triggers the second processor to execute the more accurate tight voice recognition model. This preliminary action approach ensures that the computationally intensive model is only activated when necessary, reducing average processing time and power consumption while maintaining low false rejection rates through the accuracy of the second processor when it does execute.
Data Source
AI summary
A computerized device with voice command capability processed remotely includes a low power processor, executing a loose algorithmic model to recognize a wake word prefix in a voice command, the loose model having a low false rejection rate but suffering a high false acceptance rate, and a second processor which can operate in at least a low power/low clock rate mode and a high power/high clock rate mode. When the first processor determines the presence of the wake word, it causes the second processor to switch to the high power/high clock rate mode and to execute a tight algorithmic model to verify the presence of the wake word. By using the two processors in this manner, the average overall power required by the computerized device is reduced, as is the amount of waste heat generated by the system.