Two-Stage Self-Aligned Contact Etching for Precision and Filling
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Solution Overview
Problem
Existing self-aligned contact processes face challenges such as increased aspect ratio leading to difficult etching, small process windows, misalignment, over-etching, and bowing effects, which result in incomplete contact holes and reduced filling accuracy of metal layers.
Innovation Solution
A two-stage etching process is employed, where a first dielectric layer with a stress layer is formed, and lower and upper holes are created, with the upper hole being larger than the lower hole, allowing for improved alignment and filling of conductive layers, and incorporating a liner layer to reduce hole size, while using silicon nitride and silicon oxide materials for etch stop and endpoint detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a single-stage self-aligned contact etching process is performed, then the contact hole can be formed, but the aspect ratio increases making etching difficult and the process window becomes small
Solution Approach 1:
The patent divides the single-stage etching process into two distinct stages: a first etching process that forms an initial contact hole through the dielectric layer, and a second etching process that completes the contact hole formation. This segmentation reduces the aspect ratio challenge in each individual etching step, improves etching control, and enlarges the process window while maintaining manufacturing precision.
2Manufacturing precision
If long time over-etching is performed to remove residual and keep contact hole open, then the contact hole can be fully opened, but the top corner of gate may be exposed resulting in gate poly short problem
Solution Approach 1:
The patent introduces a liner layer formed on the sidewall of the contact hole before the etching processes. This liner layer serves as a protective barrier that prevents over-etching from exposing the gate top corner, thereby eliminating the need for lengthy over-etching while maintaining complete contact hole opening and preventing gate poly short issues.
Solution Approach 2:
The liner layer acts as an intermediary protective layer between the etching process and the gate structure. It allows the etching to proceed sufficiently to open the contact hole while stopping before damaging the gate, thus mediating between the need for complete hole opening and the need to prevent gate exposure.
3Manufacturing precision
If the aspect ratio of the contact hole increases, then the contact hole can be formed, but the filling of the metal layer in the contact hole becomes increasingly difficult
Solution Approach 1:
By dividing the etching into two stages with different depths, the patent creates a contact hole structure with reduced effective aspect ratio for metal filling. The first etching process creates an initial opening, and the second process completes the hole, resulting in a structure that is easier to fill with metal layers compared to a single deep etch.
4Manufacturing precision
If misalignment occurs during lithography process, then the contact can be formed, but the aligned accuracy window between contact and gate is reduced
Solution Approach 1:
The patent employs a self-aligned contact formation process where the contact hole is formed using the gate structure itself as a reference. The two-stage etching process with liner layer protection inherently provides self-alignment, making the process less sensitive to lithography misalignment and effectively enlarging the alignment accuracy window.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of contact alignment, reduces the risk of short circuits, improves etching efficiency, and facilitates easier filling of contact holes with conductive materials, thereby increasing throughput and process window.
Implementation Method 1
utilizing different etching rates of individual film layers
Implementation Method 2
a stress layer having compressive stress is formed on the substrate, and generates a compressive stress along the channel direction in the PMOS transistor
Data Source
AI summary
A method of fabricating a self-aligned contact is provided. A first dielectric layer is formed on a substrate having a contact region therein. Next, a lower hole corresponding to the contact region is formed in the first dielectric layer. Thereafter, a second dielectric layer is formed on the first dielectric layer, and then an upper hole self-aligned to and communicated with the lower hole is formed in the second dielectric layer, wherein the upper hole and the lower hole constitute a self-aligned contact hole. Afterwards, the self-aligned contact hole is filled with a conductive layer.