Two-Stage Signal Interpolation With Reduced Coefficient Memory
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Solution Overview
Problem
Conventional signal interpolation techniques require increased memory capacity to achieve an interpolated value close to the true value, as multiple coefficients need to be stored for phase adjustment.
Innovation Solution
A signal generating device comprising a first and second digital filter, phase calculation and error calculation units, memory for storing filter coefficients, and a gain normalization unit to maintain constant filter coefficients, allowing for interpolation without increasing memory capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If more filter coefficients are stored in memory to achieve higher interpolation accuracy, then the interpolated value closer to true value is acquired, but the memory capacity increases
Solution Approach 1:
The patent divides the interpolation process into two sequential stages: first digital filter performs initial interpolation to generate first interpolated signal, then second digital filter performs correction interpolation to generate second interpolated signal. This segmentation allows each filter to use smaller coefficient sets while achieving the accuracy that would require larger coefficient sets in a single-stage system.
Solution Approach 2:
The patent introduces a temporal dimension by processing signals through two sequential filtering stages rather than one comprehensive stage. The phase calculation unit calculates phase at different time steps for each stage, enabling the system to achieve high interpolation accuracy across the full phase range by distributing the computational burden across time-separated operations rather than requiring all coefficients simultaneously in memory.
2Device complexity
If a single digital filter is used for phase interpolation, then the device complexity is reduced, but the interpolation accuracy across all phase ranges cannot be optimized
Solution Approach 1:
The patent segments the phase interpolation function into two specialized digital filters: a first digital filter for initial interpolation and a second digital filter for correction. Each filter can be designed with optimized coefficients for its specific function, achieving higher overall accuracy than a single general-purpose filter while keeping individual filter complexities manageable.
Solution Approach 2:
The first interpolated signal serves as an intermediary between the input signal and the final second interpolated signal. This intermediate representation allows the second digital filter to focus on correcting phase errors rather than performing complete interpolation from scratch, improving overall efficiency and accuracy.
3Measurement precision
If filter coefficients are switched frequently to achieve accurate interpolation at different phases, then the interpolation accuracy is improved, but the coefficient switching complexity increases
Solution Approach 1:
The patent implements dynamic coefficient selection based on calculated phase values. The phase calculation unit continuously updates phase information at each time step, and the coefficient switching unit dynamically selects appropriate coefficients from memory based on these phase calculations. This dynamic adaptation enables accurate interpolation across varying phases without requiring manual reconfiguration.
Solution Approach 2:
The system uses feedback from the phase calculation unit to control coefficient switching. The calculated phase information feeds back to the coefficient switching unit, which selects coefficients that correspond to the current phase state. This closed-loop control ensures that the most appropriate coefficients are used for the current interpolation task, maintaining accuracy while automating the switching process.
Data Source
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AI summary
To provide a signal generating device that can generate an interpolated signal without increasing a memory capacity, at a time of obtaining an interpolated value close to a true value. The signal generating device includes a digital filter unit 1 outputting a first interpolated signal by interpolating an input signal, a digital filter unit 2 outputting a second interpolated signal by interpolating the first interpolated signal, a phase calculation unit 3 calculating a phase of a digital signal, a phase-accuracy conversion unit 4 calculating first phase signal and second phase signal, a memory 5 storing filter coefficients, a coefficient readout unit 6 reading filter coefficients from the memory 5 and switching filter coefficients of the digital filter unit 1, a phase-error calculation unit 7 calculating a phase error signal, a memory 8 storing filter coefficients, a coefficient readout unit 9 reading filter coefficients from the memory 8, and a gain normalization unit 10 normalizing a gain of the filter coefficients to maintain a constant sum of the filter coefficients and switching filter coefficients of the digital filter unit 2.