Two-Terminal Memory Erase with Weak Program Filament Stabilization
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Solution Overview
Problem
Resistive-switching memory cells face issues with erase failures due to the conductive filament reverting to a low resistance state over time, leading to data loss and reduced longevity.
Innovation Solution
Implementing a modified erase process that includes a series of erase and weak program cycles, followed by read-verify operations, to form a weakly set filament that drifts to a higher resistance state, mitigating erase failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a standard erase process is applied to reset the memory cell to high resistance state, then the memory cell is quickly erased, but the conductive filament may revert to low resistance state over time causing erase failure
Solution Approach 1:
The patent applies a preliminary weak program pulse after the erase operation to proactively prevent filament reformation. This weak program pulse creates a partial conductive filament that stabilizes the erased state and prevents the filament from reverting to low resistance state over time, thereby ensuring long-term erase reliability without sacrificing erase speed
Solution Approach 2:
The patent changes the pulse parameters by introducing a weak program pulse with specific voltage and duration characteristics after erasure. This parameter change creates a controlled partial filament formation that stabilizes the high resistance state, preventing spontaneous reversion to low resistance state and improving erase reliability
2Reliability
If multiple strong program pulses are applied to ensure complete programming, then the program operation is more reliable, but the memory cell endurance is reduced due to excessive stress
Solution Approach 1:
The patent applies a weak program pulse that intentionally creates only a partial conductive filament rather than a complete one. This partial action is sufficient to stabilize the erased state and prevent filament reformation, while avoiding the excessive stress that would be caused by multiple strong program pulses, thus preserving memory cell endurance
Solution Approach 2:
The patent implements a periodic sequence of erase and weak program pulses. This periodic action allows the memory cell to be erased and then stabilized with a gentle reinforcing pulse, ensuring reliable state maintenance without subjecting the cell to continuous high-stress programming that would reduce endurance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modified erase process enhances the longevity and reliability of resistive-switching memory cells by stabilizing the high resistance state, reducing the likelihood of filament reformation and data loss.
Implementation Method 1
The weakly programmed state can be configured to drift to a higher resistance
Data Source
AI summary
Improved erase techniques enhance longevity of two-terminal non-volatile memory and can mitigate or avoid erase state memory failures. An erase process can include performing an erase operation(s) on a two-terminal memory cell, followed by a weak program operation. An erase-verify process can determine whether the memory cell has a read current within a target range. In one or more embodiments, additional erase and weak program cycles can be implemented to initiate a weakly programmed state that can be defined as an erase state. The weakly programmed state can be configured so that drift or diffusion over time results in higher resistance not reversion to a low resistance state, to mitigate or avoid erase failure of the two-terminal memory cell.