Two-Tier Optical-Electrical Interposer for High-Density Data Transmission
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Solution Overview
Problem
Current chip packaging schemes fail to support dense, high-bandwidth communications necessary for optical dies integrated in chip packages, limiting their potential in data centers and communications infrastructure.
Innovation Solution
A two-tier packaging scheme with an interposer providing high-density routing regions between integrated circuit (IC) dies and an optical die, allowing for lower data rates and improved energy efficiency, enabling 2 Tbps/mm throughput density and less than 1 pJ/bit energy efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional chip packaging schemes are used, then manufacturing simplicity is maintained, but high-bandwidth communication capability is insufficient
Solution Approach 1:
The chip package is divided into multiple functional layers: a substrate, an interposer layer with through-silicon vias, and multiple IC dies (including optical dies and electronic dies). This segmentation allows each layer to be optimized independently for its specific function while collectively achieving high-bandwidth communication capability.
Solution Approach 2:
Multiple IC dies are mounted on the interposer, which itself is mounted on the substrate. The optical dies and electronic dies are positioned in specific arrangements where smaller functional units are nested within the larger package structure, enabling dense integration of multiple communication channels.
2Adaptability or versatility
If optical dies are integrated in chip packages, then communication functionality is enhanced, but routing density and bandwidth support are insufficient
Solution Approach 1:
An interposer with through-silicon vias is introduced as an intermediary component between the substrate and the IC dies. This interposer provides high-density routing paths that support both electrical and optical signals, enabling the optical dies to achieve high bandwidth communication while maintaining design flexibility.
3Speed
If higher data rates are used, then communication speed is improved, but energy efficiency deteriorates
Solution Approach 1:
The design transitions from increasing data rate on single channels to achieving high throughput through multiple parallel channels with moderate data rates. The through-silicon via interposer enables dense routing of multiple channels, so total bandwidth (2 Tbps/mm) is achieved by multiplying moderate per-channel rates by the number of channels, improving energy efficiency.
Data Source
AI summary
An improved chip package, and methods for fabricating the same are provided that utilize two tier packaging of an optical die and another die commonly disposed over a substrate. In one example, a chip package is provided that includes an optical die, a core die, and an electrical/optical interface die are all disposed over a common substrate. In one example, a first routing region is provided between the core and electrical/optical interface dies, a second routing region is provided between the electrical/optical interface die and the optical dies, and a third routing region is disposed between the substrate and the core and electrical/optical interface dies.