Two-Way DC-DBI Bus Encoding for Static Power and DC Balance
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Solution Overview
Problem
Existing SBD-based communication systems face significant static power consumption due to constant current flow in hybrid circuitry, which is not addressed by conventional DBI encoding, and this power consumption leads to reliability issues and DC imbalance.
Innovation Solution
Implement synchronized two-way DC-DBI encoding by alternating the polarity of data transmission between transceiver pairs using a divided clock, ensuring balanced DC transmission without creating a DC imbalance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hybrid structure is used to cancel transmitted data signal in SBD signaling, then interference from transmitter is canceled for receiver, but static power consumption increases due to constant current flow
Solution Approach 1:
The patent applies periodic action by alternating the polarity of data transmission between transceiver pairs using a divided clock signal. This causes the DC levels to alternate between transceiver pairs, preventing constant current flow and reducing static power consumption while maintaining signal reception quality through periodic cancellation of transmitted signals.
2Productivity
If single-ended signaling is used to improve bandwidth-to-pins efficiency and bandwidth-to-area efficiency, then power consumption per transceiver decreases, but DC imbalance and reliability issues occur
Solution Approach 1:
The patent applies the anti-weight principle by using multiple transceiver pairs where the DC level fluctuations of one pair counterbalance those of another pair. By alternating polarity between pairs using a divided clock, the system achieves DC balance without requiring complex signaling, thereby maintaining reliability while preserving the efficiency benefits of single-ended signaling.
3Use of energy by moving object
If DC-DBI encoding is applied to reduce static power consumption, then power efficiency improves, but DC imbalance is created leading to reliability issues
Solution Approach 1:
The patent merges DC-DBI encoding with synchronized polarity alternation across multiple transceiver pairs. By combining these techniques and using a divided clock to coordinate the polarity switching, the system achieves both power efficiency through reduced constant current flow and DC balance through counterbalancing effects, eliminating the reliability issues that would otherwise result from DC imbalance.
Data Source
AI summary
A system includes first transceivers coupled to data lanes, which are coupled to second transceivers and a first encoder coupled to the first transceivers. The first encoder, responsive to detecting a transmission signal to begin a transmission mode, determines that first bits to be transmitted by the first transceivers over the data lanes include over fifty percent of a first binary value. The first encoder generates a first data-bus-inversion (DBI) polarity signal that alternates in polarity and generates first DBI-encoded bits of the first of bits based on the first DBI polarity signal. The first encoder causes the transmission signal to be transmitted to a second encoder coupled to the second transceivers, the transmission signal to synchronize DBI encoding between the first and second encoders.