Two-Wire Bus Readout Circuit for Wide Common-Mode Voltage
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Solution Overview
Problem
Differential two-wire bus reading devices, such as those for CAN networks, are rendered inoperative by variations in common mode potential, particularly during electrostatic discharges, due to their inability to robustly handle voltage fluctuations between -40 V and +40 V.
Innovation Solution
A device comprising first and second terminals connected to the differential two-wire bus, with resistive divider bridges and NMOS/PMOS transistors configured to determine the binary state of the bus from currents flowing through specific transistors, utilizing bias circuits and current feedback circuits to maintain functionality across varying common mode potentials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If known bus reading circuits are used, then the device can read digital data on the bus under normal conditions, but the device becomes inoperative during electrostatic discharge due to common mode potential variations
Solution Approach 1:
The patent applies equipotentiality by introducing a common mode voltage compensation mechanism that maintains equal potential references for both differential inputs. The circuit uses a common mode sensing path that detects voltage variations and applies compensating signals to keep the differential pair operating at stable potentials, thereby eliminating the harmful effect of common mode fluctuations during ESD events.
Solution Approach 2:
The patent introduces an intermediary common mode rejection circuit that acts as a mediator between the differential bus signals and the reading circuitry. This intermediary circuit senses common mode variations and generates compensating signals that cancel out the harmful effects, allowing the main reading circuit to operate independently of common mode disturbances.
2Reliability
If the device is designed to handle wide voltage range (-40 V to +40 V), then robustness against ESD is improved, but circuit complexity increases
Solution Approach 1:
The patent employs parameter changes by dynamically adjusting the operating parameters of the differential reading circuit based on the common mode voltage level. The circuit modifies bias currents, reference voltages, and transistor operating points in response to common mode variations, enabling the same circuit structure to handle the full -40 V to +40 V range without requiring multiple specialized circuits.
Solution Approach 2:
The patent achieves universality by designing a single reading circuit that performs multiple functions: normal differential signal reading, common mode voltage sensing, and automatic compensation. This multi-functional circuit eliminates the need for separate protection circuits, sense amplifiers, and compensation networks that would otherwise be required to handle the wide voltage range.
Data Source
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AI summary
This description relates to a device comprising identical first and second resistive voltage dividers (102, 104) connected between a reference node (106) and, respectively, first and second nodes (108, 110) coupled respectively to first and second terminals (100H, 100L). The device further comprises identical third and fourth resistive voltage dividers (300, 302) connected between a power supply node (112) and, respectively, the first and second nodes. A readout circuit (LECT') of the device is connected to an intermediate node (116) of the second divider (104), to a corresponding intermediate node (114) of the first divider (102), to an intermediate node (306) of the fourth divider (302), and to a corresponding intermediate node (304) of the third divider (300).