Two-Pass Non-Volatile Memory Programming with Error Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The programming speed of semiconductor memory systems, particularly in solid-state drives (SSDs), is limited by the number of slow-to-program memory cells, which affects overall performance and data retention.
Innovation Solution
A two-pass programming method is implemented, where the first pass quickly programs memory cells to an interim state that can be read using error correction, allowing the host to operate faster, and a second pass corrects errors and tightens threshold voltage distributions for improved data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory cells are programmed quickly to an interim state, then programming speed is improved, but data retention reliability deteriorates
Solution Approach 1:
The programming process is divided into two distinct passes: a first pass that quickly programs memory cells to an interim state with relaxed error tolerance, and a second pass that corrects errors and achieves full reliability. This segmentation allows each pass to be optimized for its specific purpose - speed for the first pass and reliability for the second pass - thereby resolving the contradiction between programming speed and data retention reliability.
Solution Approach 2:
The first pass performs a preliminary programming action that brings memory cells close to their target state without completing the full programming process. This preliminary action enables the host system to proceed with operations while error correction is performed later in the background, effectively decoupling the speed-critical path from the reliability-critical path.
2Reliability
If error correction is performed during the first pass, then data reliability is improved, but programming time increases
Solution Approach 1:
Error correction is performed periodically in the background during idle time after the first pass completes. Instead of performing error correction synchronously during the programming operation, the system uses periodic background tasks to read, correct, and re-program erroneous bits, thereby eliminating the direct time penalty from the critical programming path while still achieving high data reliability.
Solution Approach 2:
The memory system performs self-correction of programming errors through automated background processes that read the programmed data, identify errors using ECC, and re-program corrected bits without requiring host intervention. This self-service mechanism maintains high data reliability while keeping the host system unaware of the time consumed by error correction.
3Productivity
If a single pass programs all bits to final state, then manufacturing simplicity is maintained, but productivity decreases
Solution Approach 1:
The programming process dynamically adapts its complexity based on timing requirements. The first pass uses simplified programming with relaxed verification to achieve high throughput, while the second pass applies more rigorous error correction only when needed. This dynamic approach allows the system to optimize for productivity during the first pass while maintaining reliability through the conditional second pass, effectively managing the trade-off between productivity and process complexity.
Data Source
AI summary
A first phase of a programming process is performed to program data into a set of non-volatile memory cells using a set of verify references and allowing for a first number of programming errors. After completing the first phase of programming, an acknowledgement is provided to the host that the programming was successful. The memory system reads the data from the set of non-volatile memory cells and uses an error correction process to identify and correct error bits in the data read. When the memory system is idle and after the acknowledgement is provided to the host, the memory system performs a second phase of the programming process to program the corrected error bits into the set of the non-volatile memory cells using the same set of verify references and allowing for a second number of programming errors.