Two-Port On-Wafer Calibration Model for Terahertz Crosstalk

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Solution Overview

Problem

Traditional single-port on-wafer calibration piece circuit models inaccurately calibrate two-port on-wafer test systems in the terahertz frequency band due to coupling errors, leading to decreased calibration and measurement accuracy.

Innovation Solution

A two-port on-wafer calibration piece circuit model is introduced, comprising intrinsic and parasitic capacitors and resistors connected in parallel or series, along with crosstalk elements, to form new circuit models that accurately represent two-port configurations, and a method for determining parameters such as intrinsic capacitance and parasitic values using S matrix transformations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a traditional single-port calibration piece circuit model is used to calibrate two ports of an on-wafer test system, then the calibration process can be simplified, but coupling errors occur between probes resulting in decreased calibration and testing accuracy

Engineering Contradiction:
Improvecalibration process simplicityVSAvoidcalibration accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent segments the calibration model into multiple independent single-port calibration piece circuit models, each representing a specific port. By dividing the two-port calibration into separate single-port calibration segments, the system can apply the simpler single-port models to each port independently while still achieving accurate two-port calibration results, thus resolving the contradiction between operational simplicity and measurement precision.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a traditional single-port calibration piece circuit model is used for two-port calibration, then the device complexity is reduced, but coupling errors are generated between probes

Engineering Contradiction:
Improvecalibration model complexityVSAvoidcoupling errors
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary approach by using multiple independent single-port calibration piece circuit models as mediators to represent the two-port system. Each single-port model acts as an intermediary that captures the electrical characteristics of its respective port without directly modeling the complex coupling between ports, thereby reducing device complexity while minimizing coupling errors through the cumulative effect of multiple calibrated ports.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11733298B2Two-port on-wafer calibration piece circuit model and method for determining parameters
Publication Date: 2023.08.22 THE 13TH RES INST OF CHINA ELECTRONICS TECH GRP CORP
  • US11733298B2 patent drawing
  • US11733298B2 patent drawing
  • US11733298B2 patent drawing

AI summary

The present application provides two-port on-wafer calibration piece circuit models and a method for determining parameters. The method includes: measuring a single-port on-wafer calibration piece circuit model corresponding to a first frequency band to obtain a first S parameter; calculating, according to the first S parameter, an intrinsic capacitance value of a two-port on-wafer calibration piece circuit model corresponding to the single-port on-wafer calibration piece circuit model; measuring the two-port on-wafer calibration piece circuit model corresponding to the terahertz frequency band to obtain a second S parameter; and calculating a parasitic capacitance value and a parasitic resistance value of the two-port on-wafer calibration piece circuit model according to the second S parameter and the intrinsic capacitance value.