UART Break Detection Counter Mechanism
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Solution Overview
Problem
Legacy UARTs in microcontrollers lack the ability to automatically detect break (BRK) characters regardless of their position within a byte, leading to errors and incomplete data reception, especially in protocols like LIN where BRK can occur mid-byte.
Innovation Solution
A universal asynchronous receiver/transmitter (UART) module with a programmable receiver clock and counter that resets with every falling edge of the data signal, triggering a BRK detection signal when reaching a programmable threshold value, allowing for automatic detection of BRK characters regardless of their timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a legacy UART is used without BRK detection capability, then the device complexity is reduced, but the reliability of data reception deteriorates when BRK occurs mid-byte
Solution Approach 1:
The receiver unit is segmented into multiple independent components: a counter module that detects low-level signal duration, a state machine that coordinates detection states, and a BRK detection logic that generates interrupt signals. This segmentation allows the BRK detection function to be added without redesigning the entire UART receiver, thus improving reliability while minimizing complexity increase.
Solution Approach 2:
A dedicated counter module acts as an intermediary between the received signal and the main receiver unit. This counter specifically measures the duration of low-level signals and triggers BRK detection when the threshold is met, serving as a mediator that isolates the complexity of BRK detection from the core reception logic.
2Adaptability or versatility
If BRK detection is added to detect mid-byte break characters, then the reliability of protocol compliance (e.g., LIN) is improved, but the device complexity increases due to additional counter and control logic
Solution Approach 1:
The counter module serves multiple functions: it counts clock cycles for BRK detection, measures signal duration, and can be configured with programmable thresholds to adapt to different protocols. This multi-functionality allows a single component to handle various protocol requirements without proportionally increasing complexity.
Solution Approach 2:
The BRK detection threshold is made programmable and dynamic rather than fixed. The counter can be configured with different threshold values to accommodate different protocol requirements (e.g., LIN protocol vs. other serial protocols), allowing the system to adapt to different protocols without hardware changes.
3Measurement precision
If the counter counts every clock cycle to detect BRK, then the measurement precision of break duration is improved, but the loss of time occurs during counting operations
Solution Approach 1:
The counter is pre-configured with the appropriate threshold value before detection begins. The state machine pre-positions the counter in the correct detection state, and the threshold is programmed in advance based on the expected BRK duration. This preliminary configuration eliminates the need for real-time calculation during detection, reducing time loss.
Solution Approach 2:
Once the counter reaches the pre-set threshold, the system immediately triggers the BRK detection interrupt without continuing to count. This skipping approach allows the system to quickly identify BRK characters by rushing through the counting process as soon as the characteristic duration is achieved, minimizing detection time.
Data Source
AI summary
A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include a receiver unit being clocked by a programmable receiver clock configured to sample an incoming data signal and comprising a counter clocked by said receiver clock, wherein the counter is reset to start counting with every falling edge of the data signal and to trigger a BRK detection signal if the counter reaches a programmable threshold value.