Self-Aligned UBM Interconnects With Blocking Film Deposition
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Solution Overview
Problem
In semiconductor device manufacturing, the integration of conductive features and dielectric layers is challenging due to issues with contact resistance and lateral deposition of etch stop layers, which affect device performance and increase defects.
Innovation Solution
The method involves forming a blocking film over conductive features using molecular layer deposition (MLD) to prevent lateral deposition of the etch stop layer, followed by photolithography and etching processes to create openings and form additional conductive features, thereby increasing the landing area and reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If an etch stop layer is deposited over conductive features, then lateral deposition can be controlled, but contact resistance increases and landing area decreases
Solution Approach 1:
The patent segments the etch stop layer deposition process by introducing a blocking film that selectively prevents etch stop layer deposition on specific surfaces (conductive features) while allowing it on other surfaces (dielectric layers). This segmentation resolves the contradiction by enabling lateral deposition control on dielectric layers without increasing contact resistance on conductive features.
Solution Approach 2:
The blocking film creates local quality differences in the structure - areas with blocking film have different deposition properties than areas without it. This allows the etch stop layer to be deposited with controlled lateral coverage on dielectric layers while maintaining full coverage and low contact resistance on conductive features where the blocking film is present.
2Manufacturing precision
If blocking film is deposited to prevent lateral deposition, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The blocking film is deposited in advance before the etch stop layer, creating a preliminary structure that guides subsequent deposition. This preliminary action enables precise thickness control of the etch stop layer without requiring complex in-situ monitoring or adjustment mechanisms during the deposition process.
Solution Approach 2:
The blocking film acts as an intermediary layer between the conductive features and the etch stop layer. It mediates the deposition process by selectively allowing or preventing etch stop layer formation, thereby simplifying the overall process control compared to attempting to directly control etch stop layer deposition without such an intermediary.
3Ease of manufacture
If conventional deposition methods are used, then process simplicity is maintained, but lateral deposition of etch stop layer increases defects
Solution Approach 1:
The patent extracts the problematic lateral deposition effect by introducing the blocking film that selectively removes the etch stop layer deposition from specific areas (conductive features). This extraction approach maintains the simplicity of conventional deposition methods while eliminating the harmful lateral deposition defects on conductive features.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device performance by reducing contact resistance and minimizing defects, allowing for more precise control over layer thickness and deposition, enhancing the integration of conductive features and dielectric layers.
Implementation Method 1
A blocking film is selectively deposited over the first conductive features, without being deposited on the first dielectric layer. The blocking film may be a polymer material, which may be formed by molecular layer deposition (MLD) or the like.
Data Source
AI summary
An improved method of forming conductive features and a semiconductor device formed by the same are disclosed. Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a first dielectric layer over an integrated circuit device; forming a first conductive feature in the first dielectric layer; selectively depositing a polymer layer over the first conductive feature; selectively depositing an etch stop layer over the first dielectric layer adjacent the polymer layer; removing the polymer layer to form a first opening; and forming a second conductive feature in the first opening and electrically coupled to the first conductive feature.


