UBM Capping Layer Structure for Planar Solder Terminals
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Solution Overview
Problem
Existing semiconductor structures face challenges in achieving high planarity at the outermost surfaces of terminals, leading to voids during solder joint processes, which affect the reliability and performance of semiconductor packages.
Innovation Solution
A semiconductor structure with a capping layer disposed over under-bump metallization (UBM) and a redistribution circuit structure, ensuring high planarity at the outermost surfaces, thereby reducing void formation during solder joint processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional semiconductor structures are used without a capping layer, then the manufacturing process is simpler, but the outermost surfaces of terminals exhibit poor planarity leading to void formation during solder joint processes
Solution Approach 1:
The terminal structure is segmented into multiple functional layers: UBM layer, redistribution circuit structure, and capping layer. This segmentation allows each layer to perform its specific function optimally, with the capping layer specifically dedicated to providing high planarity for the outermost surface, thereby resolving the planarity issue without complicating the entire device structure.
Solution Approach 2:
The capping layer is formed in advance before the solder joint process to pre-establish the required planarity of the outermost surface. This preliminary action ensures that when soldering occurs, the surface is already optimized for void-free joint formation, eliminating the need for post-processing adjustments.
2Reliability
If a capping layer is added to improve planarity, then void formation is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The manufacturing process is segmented into distinct stages: forming the UBM layer, forming the redistribution circuit structure, and forming the capping layer. This segmentation allows each manufacturing step to be optimized independently, with the capping layer formation being a simple deposition process that can be integrated into existing manufacturing workflows without significantly increasing overall complexity.
Solution Approach 2:
The terminal structure uses composite materials with different properties: the UBM layer provides electrical connection, the redistribution circuit structure provides routing functionality, and the capping layer provides planarity. This composite approach allows each material to be selected for its optimal performance in its specific function, improving reliability while maintaining manufacturing ease through standardized material deposition processes.
Data Source
AI summary
A semiconductor structure includes a semiconductor die, a redistribution circuit structure, and a terminal. The redistribution circuit structure is disposed on and electrically coupled to the semiconductor die. The terminal is disposed on and electrically coupled to the redistribution circuit structure, where the redistribution circuit structure is disposed between the semiconductor die and the terminal, and the terminal includes an under-bump metallization (UBM) and a capping layer. The UBM is disposed on and electrically coupled to the redistribution circuit structure, where the UBM includes a recess. The capping layer is disposed on and electrically coupled to the UBM, where the UBM is between the capping layer and the redistribution circuit structure, and the capping layer fills the recess of the UBM.