Semiconductor UBM Isolation Structure for Seed Layer Etching

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Solution Overview

Problem

The challenge in semiconductor packaging lies in forming solder bumps and under bump metallurgies (UBMs) with reduced pitch, where conventional techniques face difficulties in removing seed layers between closely spaced solder bumps without damaging the UBMs, often resulting in over-etching that can lead to cracking.

Innovation Solution

The introduction of isolation structures between UBMs, formed using insulating materials and grayscale photomasks, facilitates efficient etching by reducing the aspect ratio between UBMs, allowing capillarity to guide the etchant and prevent seed layer damage, thereby maintaining UBM integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If over-etching technique is used to remove seed layer between solder bumps, then seed layer removal is facilitated, but UBM may be damaged

Engineering Contradiction:
Improveseed layer removalVSAvoidUBM integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces isolation structures that segment the continuous seed layer into isolated regions between solder bumps. This segmentation allows the etchant to selectively remove the seed layer in inter-bump regions while preserving the seed layer beneath the UBMs, thereby facilitating seed layer removal without damaging the UBMs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structures serve as intermediary elements that mediate between the etchant and the UBM regions. These structures guide the etchant flow and prevent direct contact with the UBM areas, enabling controlled seed layer removal while protecting the UBMs from over-etching damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If pitch between solder bumps is reduced to increase I/O, then package density is improved, but etching process becomes more difficult

Engineering Contradiction:
Improvepackage I/O densityVSAvoidetching process
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by forming isolation structures before the seed layer removal etching process. These pre-formed structures create defined pathways and boundaries that guide subsequent etching operations, making the etching process easier and more controllable even at reduced pitch dimensions where space is limited.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise and efficient removal of seed layers between solder bumps, reducing the risk of UBM damage and maintaining the structural integrity of conductive pillars, thus enhancing the reliability of semiconductor devices.

Implementation Method 1

allowing capillarity to guide the etchant and prevent seed layer damage

Methodology Applied
Scientific EffectCapillarity: Capillary Action

Data Source

PatentUS9984986B1Semiconductor device and method of manufacturing the same
Publication Date: 2018.05.29 ADVANCED SEMICON ENG INC
  • US9984986B1 patent drawing
  • US9984986B1 patent drawing
  • US9984986B1 patent drawing

AI summary

A semiconductor device includes a substrate, a patterned conductive layer on the substrate, a passivation layer on the substrate and surrounding the patterned conductive layer, a first under bump metallurgy (UBM) and a second UBM on the passivation layer and electrically connected to the patterned conductive layer, and an isolation structure on the passivation layer and between the first UBM and the second UBM.