UBM Via Layout for Lower Stress on Redistribution Vias

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Solution Overview

Problem

The semiconductor package faces reliability issues due to high stress applied to the redistribution via of the redistribution layer, particularly in panel level packages, which can lead to cracking and interface delamination under thermal cycles and impacts.

Innovation Solution

A new underbump metallurgy (UBM) structure is designed with UBM pads and vias that overlap and do not overlap in the stacking direction, respectively, and have non-circular cross sections, to reduce stress on the redistribution via by adjusting their array and structure, ensuring a sufficient interval and contact area between the UBM via and redistribution via.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional UBM structure is used with standard via arrangement, then the electrical connection is established, but high stress is applied to the redistribution via causing reliability problems

Engineering Contradiction:
Improvereliability of redistribution viaVSAvoidstress on redistribution via
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The patent applies asymmetry by configuring the UBM via with a non-circular cross-section (rectangular, square, or oval) instead of a conventional circular cross-section. This asymmetric geometry allows the UBM via to overlap the UBM pad in plan view while maintaining a sufficient interval from the redistribution via in the stacking direction, thereby reducing stress concentration on the redistribution via while ensuring adequate electrical connection area.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the UBM via is positioned to overlap the redistribution via, then electrical connection is improved, but stress concentration increases causing cracking and delamination

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidstress concentration on redistribution via
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent resolves the contradiction by transitioning from a vertical stacking arrangement to a lateral offset arrangement in the plan view dimension. The UBM via is positioned to overlap the UBM pad in plan view but maintains a sufficient interval from the redistribution via in the stacking direction. This dimensional repositioning allows electrical connection through lateral overlap while avoiding stress concentration through vertical separation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Stress or pressure

If the UBM via is positioned far from the UBM pad, then stress on redistribution via is reduced, but electrical connection area is insufficient

Engineering Contradiction:
Improvestress on redistribution viaVSAvoidcontact area between UBM via and UBM pad
Core Design Contradiction:
Stress or pressureVSArea of stationary object

Solution Approach 1:

The non-circular cross-section of the UBM via enables it to be positioned such that it overlaps the UBM pad in plan view, maximizing the contact area in the lateral dimension, while maintaining a sufficient interval in the stacking direction to reduce stress on the redistribution via. This asymmetric configuration optimizes both electrical connection area and stress distribution.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11742308B2Semiconductor package for reducing stress to redistribution via
Publication Date: 2023.08.29 SAMSUNG ELECTRONICS CO LTD
  • US11742308B2 patent drawing
  • US11742308B2 patent drawing
  • US11742308B2 patent drawing

AI summary

A semiconductor package includes: a connection member having a first surface and a second surface opposing each other in a stacking direction of the semiconductor package and including an insulating member and a redistribution layer formed on the insulating member and having a redistribution via; a semiconductor chip disposed on the first surface of the connection member and having connection pads connected to the redistribution layer; an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip; a passivation layer disposed on the second surface of the connection member; UBM pads disposed on the passivation layer and overlapping the redistribution vias in the stacking direction; and UBM vias connecting the UBM pads to the redistribution layer through the passivation layer, not overlapping the redistribution vias with respect to the stacking direction, and having a non-circular cross section.