UCIe Die-to-Die Interface for Multi-Protocol Chiplet Interoperability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Legacy die-to-die (D2D) interconnects lack interoperability and do not provide a mechanism for seamless interoperability between dies, often being vendor-specific or application-specific, and do not support ubiquitous load-store input/output protocols, limiting innovation and integration flexibility.

Innovation Solution

A general-purpose D2D interconnect, referred to as Universal Chiplet Interconnect express (UCIe), which supports multiple communication protocols (PCIe and CXL) and includes a layered protocol stack with a die-to-die adapter and physical layer, enabling seamless interoperability and allowing vendors to mix and match components from different providers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If legacy vendor-specific D2D interconnects are used, then implementation simplicity is maintained, but interoperability between dies from different vendors is lost

Engineering Contradiction:
ImproveinteroperabilityVSAvoidinterface standardization
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal D2D interconnect interface that can work with dies from different vendors and support multiple protocols (PCIe, CXL, HBM). The interface defines standardized physical layer, link layer, and protocol layers that enable any compliant die to interoperate with any other compliant die, eliminating vendor lock-in while maintaining implementation simplicity through standardized building blocks.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If application-specific D2D interconnects are used, then optimization for specific applications is achieved, but flexibility for general-purpose use is reduced

Engineering Contradiction:
Improveprotocol supportVSAvoidintegration flexibility
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The interconnect interface is segmented into distinct layers: physical layer (signal transmission), link layer (data link management), and protocol layers (PCIe, CXL, HBM). This segmentation allows each layer to be independently implemented and optimized, enabling manufacturers to choose which protocol layers to implement based on application needs while maintaining a standardized physical and link layer for ease of integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interface design allows dynamic selection and configuration of protocol layers based on application requirements. The standardized base layers remain fixed for manufacturing simplicity, while upper protocol layers can be dynamically configured or selected to match specific application needs, providing both flexibility and ease of manufacture.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If proprietary D2D interconnects are used, then vendor control is maintained, but ecosystem innovation and IP provider diversity are limited

Engineering Contradiction:
Improveecosystem opennessVSAvoidinterface architecture
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The standardized D2D interconnect interface acts as an intermediary layer between proprietary IP cores and the physical transmission medium. This intermediary defines clear boundaries and standardized interfaces that allow multiple IP providers to develop compliant dies without needing to negotiate proprietary interfaces, fostering ecosystem innovation while managing complexity through standardization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12481614B2Standard interfaces for die to die (D2D) interconnect stacks
Publication Date: 2025.11.25 INTEL CORP
  • US12481614B2 patent drawing
  • US12481614B2 patent drawing
  • US12481614B2 patent drawing

AI summary

In one embodiment, a first die comprises: a first die-to-die adapter to communicate with first protocol layer circuitry via a flit-aware die-to-die interface (FDI) and first physical layer circuitry via a raw die-to-die interface (RDI), where the first die-to-die adapter is to receive message information comprising first information of a first interconnect protocol; and the first physical layer circuitry coupled to the first die-to-die adapter. The first physical layer circuitry may be configured to receive and output the first information to a second die via an interconnect, the first physical layer circuitry comprising a plurality of modules, each of the plurality of modules comprising an analog front end having transmitter circuitry and receiver circuitry. Other embodiments are described and claimed.