UFS Hibernate Exit Timing Using Reference Clock Monitoring

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Solution Overview

Problem

Current UFS devices experience delays in exiting the hibernate state due to reliance on squelch detection, which prolongs the time required to respond to host requests for data bursts.

Innovation Solution

The method involves monitoring the reference clock signal to initiate the exit from hibernation state without waiting for squelch detection, allowing the device to power up components earlier and reduce the hibernation exit time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the device waits for squelch detection to exit hibernation state, then the device can ensure stable signal detection, but the hibernation exit time is prolonged

Engineering Contradiction:
Improvesignal detection stabilityVSAvoidhibernation exit time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The device performs preliminary actions by detecting the reference clock signal activation and initiating the exit from hibernation state before squelch detection is complete. The controller starts the T-Activate timer and begins activating data storage device blocks as soon as the reference clock is detected, rather than waiting for squelch detection to finish, thereby reducing overall exit time while maintaining signal stability through the established activation sequence.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the device uses squelch detection to monitor hibernation exit request, then the device can accurately detect the exit request, but the device complexity increases

Engineering Contradiction:
Improveexit request detection accuracyVSAvoidsquelch detection logic
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The invention extracts and eliminates the squelch detection logic from the hibernation exit monitoring process. Instead of using squelch detection to monitor for exit requests, the device now relies on the reference clock signal activation as the trigger for exiting hibernation state. This removal of the squelch detection component simplifies the device architecture while maintaining accurate detection of exit requests through the reference clock signal.

Inventive Principle:
Principle #2Taking out (Extraction)

3Stability of the object's composition

If the device activates data storage device blocks after squelch detection, then the device can ensure proper signal stabilization, but the activation time is increased

Engineering Contradiction:
Improvesignal stabilizationVSAvoidactivation time
Core Design Contradiction:
Stability of the object's compositionVSDuration of action of moving object

Solution Approach 1:

The device performs preliminary activation of data storage device blocks by initiating the T-Activate timer immediately upon detecting reference clock signal activation, before squelch detection completes. This preliminary action allows the blocks to start activating earlier in the process, reducing the overall activation time while the signal stabilization is maintained through the controlled activation sequence defined by the T-Activate timer duration.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12481509B2Hiberate (HIB8) exit time for universal flash storage (UFS) devices by monitoring when to enable or disable low power states without waiting on squelch detection
Publication Date: 2025.11.25 SANDISK TECHNOLOGIES LLC
  • US12481509B2 patent drawing
  • US12481509B2 patent drawing
  • US12481509B2 patent drawing

AI summary

Rather than waiting on a squelch to detect the difference in the state from steady to floating, this disclosure suggests using the time from when a reference clock is turned on to begin the process to exit the hibernation state. The reference clock is turned off while a data storage device is in the hibernation state to save power. Once the host is ready for the device to exit the hibernation state, the reference clock is turned on. The reference clock is monitored for the change. Once the reference clock is on, the data storage device returns to a steady state. In the ready state, the data storage device has a shortened ready time. Once the ready time is complete, the data storage device may now exit the hibernation state without waiting on squelch detection or a hibernation exit request from the host.