UHV LDMOS Drain Structure for ESD and Breakdown Voltage
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Solution Overview
Problem
Conventional ultra high voltage (UHV) lateral diffusion metal-oxide-semiconductor (LDMOS) devices are susceptible to electrical overstress and have low breakdown voltage thresholds, making them vulnerable to electrical static and noise, which complicates and increases the cost of integrated circuit (IC) devices by requiring additional protective circuitry.
Innovation Solution
A semiconductor device design with enhanced electrostatic discharge (ESD) capabilities, featuring a semiconductor substrate with a drain region and source region structure that includes specific doping types and concentrations, and a gate electrode layer, which improves ESD performance and breakdown voltage thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional UHV LDMOS devices are used, then power management function is achieved, but electrostatic discharge performance is poor and breakdown voltage threshold is low
Solution Approach 1:
The patent applies parameter changes by modifying the doping concentration profile in the drift region, specifically creating a graded doping structure where doping concentration varies continuously from the source to the drain. This parameter modification enables the device to achieve both high breakdown voltage (100V-1000V) and improved ESD performance without requiring additional protective circuitry
Solution Approach 2:
The patent implements local quality by creating regions with different doping concentrations within the drift region. The graded doping structure provides different local properties: higher doping near the source for better carrier injection and lower doping near the drain for higher breakdown voltage, thereby simultaneously improving ESD performance and voltage handling capability
2Reliability
If additional protective circuitry is added to conventional UHV LDMOS devices, then electrostatic discharge protection is improved, but device complexity and cost increase
Solution Approach 1:
The patent applies universality by designing the drift region to perform multiple functions simultaneously: it provides voltage blocking capability (breakdown voltage > 100V), current conduction path, and electrostatic discharge protection. The graded doping structure in the drift region inherently provides ESD robustness while maintaining the power switching function, eliminating the need for separate protective circuits
Solution Approach 2:
The patent merges the ESD protection function with the existing drift region structure. Instead of adding separate protection circuits, the ESD capability is integrated into the drift region through graded doping, combining the voltage blocking, current conduction, and ESD protection functions into a single structural element
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The semiconductor device exhibits 100% better ESD performance and a 176% improvement in on-breakdown voltage compared to conventional UHV LDMOS devices, reducing the need for additional protective circuitry and simplifying IC device design.
Implementation Method 1
The drain region comprises a drain rectangular portion having a first end and a second end, a first drain end portion contiguous with the drain rectangular portion and extending from the first end of the drain rectangular portion away from a center of the drain region, and a second drain end portion contiguous with the drain rectangular portion and extending from the second end of the drain rectangular portion away from a center of the drain region. The first drain end portion and the second drain end portion have a same doping type and a different doping concentration than the drain rectangular portion.
Data Source
AI summary
A device having a drain region with a drain rectangular portion having a first end and a second end, a first drain end portion contiguous with the drain rectangular portion and extending from the first end of the drain rectangular portion away from a center of the drain region, and a second drain end portion contiguous with the drain rectangular portion and extending from the second end of the drain rectangular portion away from the center of the drain region. The semiconductor device also comprises a source region spaced from and surrounding the drain region in the first layer.