uLED Sidewall Defect Control via Patterned Substrate Growth
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Micrometer-scale light emitting diodes (uLEDs) face efficiency losses due to defects at the etch sidewalls, leading to non-radiative carrier recombination and leakage currents, which complicates manufacturing and increases costs, especially for high-density display applications like 4K panels.
Innovation Solution
A patterned substrate and epitaxial structure design that reduces growth rates on sloped sidewalls, blocking p-side carrier transport and maintaining n-side lateral current flow, eliminating the need for post-growth processing steps and reducing fabrication complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching and post-growth processing are used to manage sidewall defects, then manufacturing precision may be maintained, but device complexity and fabrication cost increase
Solution Approach 1:
The patent applies preliminary action by designing the substrate pattern and epitaxial growth conditions beforehand to inherently produce thinner deposition on sidewalls during the growth process itself, eliminating the need for subsequent post-growth processing steps to correct sidewall defects. The patterned substrate with controlled geometry pre-determines the desired thin sidewall structure before growth occurs.
Solution Approach 2:
The epitaxial growth process serves itself by naturally producing thinner deposition on sidewalls through the interaction between the patterned substrate geometry and growth conditions, without requiring external intervention or additional processing steps. The system self-regulates the deposition thickness based on the substrate pattern.
2Ease of manufacture
If thinner deposition on sidewalls is achieved through patterned substrates, then manufacturing cost and process steps are reduced, but control over deposition uniformity becomes more challenging
Solution Approach 1:
The patent applies local quality by creating spatial variation in deposition thickness across different regions of the substrate. The patterned substrate design intentionally produces thinner deposition specifically on sidewall regions while maintaining appropriate thickness on flat surfaces, with the local deposition characteristics controlled by the local substrate geometry rather than requiring uniform conditions across the entire substrate.
Solution Approach 2:
The patent utilizes parameter changes by modifying the substrate pattern geometry (shape, size, spacing) and epitaxial growth conditions (temperature, pressure, flow rates) to control the deposition thickness variation. By adjusting these parameters, the process achieves thinner sidewall deposition while maintaining overall deposition uniformity across the substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency and reduces manufacturing costs of uLEDs, enabling the production of high-density display panels with improved luminous efficacy and flexibility, suitable for applications like Virtual/Mixed/Augmented Reality hardware and high-end wearables.
Implementation Method 1
a plurality of semiconductor epitaxial layers covering the first, second, and third regions
Implementation Method 2
a light emitting active region of direct bandgap semiconductor, sandwiched between n-type and p-type layers
Data Source
AI summary
A uLED and method for regrowth with thinner deposition on sidewall are disclosed. The uLED and method include a growth substrate including flat first and second regions, where the growth substrate is thicker in the first region as compared to the second region, and a third region of sloped sidewalls connecting the first and second regions, the topography forming a regular geometric pattern, a plurality of semiconductor epitaxial layers covering the first, second, and third regions including at least a p-n junction layer including a light emitting active region of direct bandgap semiconductor, sandwiched between n-type and p-type layers, each of the plurality of semiconductor epitaxial layers being thicker on the first and second regions as compared to the corresponding semiconductor epitaxial layers on the third region, and a plurality of electrical contacts forming an anode and cathode on part of the first and second regions, respectively.