Ultra-high endurance SCM host data buffer for QLC memory protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory sub-systems face challenges in managing data endurance, particularly in high-write workloads, where QLC memory is fragile and limits usability due to endurance and Quality of Service (QOS) constraints.
Innovation Solution
Utilizing ultra-high endurance storage class memory as a host data buffer to filter and manage overwritten data, thereby reducing the load on primary memory devices and improving their endurance. This involves dynamically adjusting the size of the host data buffer based on the amount of overwritten data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If QLC memory is used to increase storage capacity, then storage density is improved, but endurance and reliability deteriorate due to fragility and write limitations
Solution Approach 1:
The memory sub-system is segmented into multiple memory devices with different characteristics (QLC, TLC, SLC). Each device type handles different workload requirements, with SLC/TLC devices absorbing write-intensive operations to protect QLC devices and preserve their endurance while maintaining high storage capacity.
Solution Approach 2:
A buffer management component acts as an intermediary between the host and memory devices, intelligently routing write operations. It monitors buffer utilization and selectively directs data to appropriate memory device types based on current workload, buffer status, and device characteristics, thereby protecting QLC devices from excessive writes.
2Reliability
If a buffer is used to filter overwritten data, then endurance of primary memory devices is improved, but device complexity increases due to buffer management requirements
Solution Approach 1:
The buffer management component autonomously monitors buffer utilization metrics and automatically adjusts buffer allocation and data routing decisions without host intervention. It self-regulates by tracking write patterns, buffer fill levels, and memory device status, making intelligent decisions to route data appropriately and manage buffer resources dynamically.
Solution Approach 2:
The system dynamically changes operational parameters including buffer size allocation, buffer utilization thresholds, and data routing decisions based on real-time conditions. The buffer management component adjusts these parameters adaptively to optimize the balance between protecting memory device endurance and managing buffer complexity efficiently.
Data Source
AI summary
A processing device in a memory sub-system receives host data to be stored in a memory sub-system including a memory device and an ultra-high endurance storage class memory device. The processing device further causes the host data to be stored in a host data buffer of the ultra-high endurance storage class memory device. The processing device causes a first portion of the host data stored in the host data buffer to be overwritten during a buffer tenure. In response to determining that a second portion of the host data satisfied a buffer tenure requirement, causing the second portion of the host data to be written from the host data buffer to the primary memory of the memory device.