Ultra-Large-Scale SOC Module Division for Timing Closure
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Solution Overview
Problem
Existing methods for timing closure of ultra-large-scale SOCs face high costs due to the need for high-performance servers and are inefficient due to large data sizes, leading to prolonged recovery times and instability of timing recovery tools.
Innovation Solution
A method involving module division of the SOC into three parts, using a timing recovery tool and EDA software to process each module separately, creating process corners, and performing timing violation fixing and physical placement/routing to achieve timing closure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-performance servers are used to process timing data for timing closure, then the processing capability and storage performance are improved, but the server cost and chip development cost increase
Solution Approach 1:
The patent divides the ultra-large-scale SOC into multiple modules, separating timing data processing into module-level tasks. This segmentation reduces the data volume each server must process, enabling common servers to handle timing closure tasks without requiring expensive high-performance servers with massive storage capacity.
2Reliability
If the size of timing data is large, then the coverage of timing recovery is improved, but the timing recovery tool becomes unstable and the recovery time increases
Solution Approach 1:
The patent implements module-level timing recovery by dividing the SOC into multiple modules. Each module's timing data is processed separately, reducing the data size for each timing recovery operation. This ensures tool stability and reduces recovery time while maintaining comprehensive coverage through systematic processing of all modules across multiple epochs.
Solution Approach 2:
The patent performs preliminary identification of specific modules requiring timing recovery before actual recovery operations. By pre-processing timing data to determine which modules need recovery and identifying attribute-maintained versus to-be-recovered parts, the system prepares data in advance, reducing the actual recovery time and improving tool stability during the recovery process.
3Reliability
If the size of timing data is large, then the timing recovery coverage is improved, but the timing recovery tool becomes unstable
Solution Approach 1:
The patent divides the ultra-large-scale SOC into multiple modules, processing timing data at the module level rather than handling the entire chip at once. This segmentation reduces the data volume for each timing recovery operation to a manageable size, preventing tool crashes and instability while ensuring comprehensive coverage through systematic processing of all modules across multiple epochs.
Data Source
AI summary
A method for implementing timing closure of an ultra-large-scale SOC based on module division includes the following steps: S1, acquiring timing data of a full chipset, and dividing an SOC into three modules; S2, reading lib, lef, netlist and def in each module, determining each specific module requiring timing recovery and each prototype module not requiring timing recovery, reading lib and lef in each specific module, and reading netlist and def in each prototype module; S3, creating multiple process corners and acquiring timing data of each process corner, and back-annotating and reading netlist and def out of the multiple process corners corresponding to each specific module to determine an attribute-maintained part and a to-be-recovered part; and setting the attribute-maintained part and each prototype module to be in a not-to-be-recovered state; and S4, sending out a timing recovery command, and performing timing violation fixing on the to-be-recovered part.