Ultra-thin Chip with High Modulus Protective Layer

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Solution Overview

Problem

The increasing difficulty in clamping and stacking ultra-thin chips due to their low strength, which makes them prone to breaking under external forces during the packaging process, especially in 3D stacking applications.

Innovation Solution

A protective layer formed by a high modulus material is added to the chip to increase its thickness and strength, providing deformation resistance and reducing the risk of breakage during clamping and stacking processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If chip thickness is continuously decreased to achieve miniaturization, then component size on chip is reduced and integration is improved, but chip strength becomes lower and clamping/stacking difficulty increases

Engineering Contradiction:
Improvechip sizeVSAvoidchip strength
Core Design Contradiction:
Volume of moving objectVSStrength

Solution Approach 1:

The patent applies composite material structure by combining the ultra-thin chip with a protective layer made of different material (epoxy resin or glass). This composite structure allows the chip to maintain its thin profile while the protective layer provides the necessary mechanical strength and deformation resistance for handling and stacking processes.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The protective layer is formed by encapsulating the ultra-thin chip within a molding compound, creating a nested structure where the chip is embedded in the protective material. This nesting approach protects the fragile chip while maintaining a compact overall structure suitable for 3D stacking.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of moving object

If chip thickness is decreased to achieve ultra-thin profile, then chip size is reduced, but deformation resistance capability becomes lower and breakage risk increases

Engineering Contradiction:
Improvechip thicknessVSAvoidchip reliability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

By using composite materials (chip + protective layer), the structure achieves both thin profile and high reliability. The protective layer material (epoxy resin or glass) provides superior mechanical properties and deformation resistance compared to the thin chip alone, significantly reducing breakage risk during handling and stacking.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The protective layer acts as a protective shell encapsulating the thin chip. This shell structure provides mechanical protection and deformation resistance while maintaining the overall thin profile of the device, enabling reliable handling of ultra-thin chips.

Inventive Principle:
Principle #30Flexible shells and thin films

3Strength

If protective layer is added to increase chip thickness, then chip strength is improved, but overall device size increases

Engineering Contradiction:
Improvechip strengthVSAvoidchip thickness
Core Design Contradiction:
StrengthVSLength of moving object

Solution Approach 1:

The protective layer is designed as a thin film/shell structure that provides maximum protection with minimum thickness. This allows the chip strength to be significantly improved while adding minimal overall thickness to the device, maintaining compact form factor for 3D stacking applications.

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The composite structure optimizes the thickness-strength tradeoff by using a thin protective layer of high-strength material (epoxy resin or glass) that provides sufficient mechanical support without significantly increasing overall device thickness.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20230012986A1Chip structure and chip preparation method
Publication Date: 2023.01.19 HUAWEI TECH CO LTD
  • US20230012986A1 patent drawing
  • US20230012986A1 patent drawing
  • US20230012986A1 patent drawing

AI summary

This disclosure provides a chip structure, including a first chip and a first protective layer, where the first protective layer covers a first surface of the first chip; and a first conductive connector is vertically disposed in the first protective layer, the first conductive connector penetrates through an upper surface and a lower surface of the first protective layer, one end of the first conductive connector is electrically connected to the first surface of the first chip, the other end of the first conductive connector is exposed to the first protective layer, and the first protective layer is formed by a material whose modulus is greater than a preset value.