Ultra-thin Power Transistor with Customized Footprint

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Solution Overview

Problem

Existing power MOSFET packages are too thick and burdened with parasitic electrical and thermal resistances, limiting their thermal and electrical efficiencies, and often require modifications to accommodate direct implementation into printed circuit boards.

Innovation Solution

A two-strata assembly of a FET chip attached to a leadframe with distinct thickness portions, where the thicker portion is exposed for cooling and the thinner portion is encapsulated, allowing for a thin package structure without bonding wires or clips, enabling efficient heat dissipation and direct PCB attachment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bonding wires and clips are used to connect power MOSFET chips to leadframe, then electrical connections are established, but parasitic electrical resistance and thermal resistance increase, reducing electrical and thermal efficiency

Engineering Contradiction:
Improveelectrical efficiencyVSAvoidparasitic resistance
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The invention removes bonding wires and connecting clips from the assembly, eliminating the parasitic resistance and thermal resistance they introduce. The power MOSFET chip is directly mounted to the leadframe, extracting the problematic intermediate connection elements while maintaining electrical connectivity through direct contact between the chip terminals and leadframe contact pads.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the power MOSFET chip directly with the leadframe by eliminating intermediate connection elements. The chip is mounted directly to the leadframe contact pads, creating a unified assembly where the chip and leadframe form an integrated electrical and thermal path, reducing interface resistance and improving efficiency.

Inventive Principle:
Principle #5Merging (Combining)

2Strength

If a thick leadframe structure is used to support power MOSFET chips, then mechanical strength and thermal management are improved, but package thickness increases beyond 0.5 mm, limiting application in thin designs

Engineering Contradiction:
Improvemechanical strengthVSAvoidpackage thickness
Core Design Contradiction:
StrengthVSLength of moving object

Solution Approach 1:

The leadframe is designed with non-uniform thickness, featuring a thicker portion (first thickness) for mechanical strength and thermal management, and a thinner portion (second thickness) for reduced overall package thickness. This local quality variation allows the structure to meet both strength requirements and thin design constraints simultaneously.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention addresses the thickness constraint by varying the leadframe thickness in the vertical dimension while maintaining adequate mechanical strength through strategic thickening at critical support locations. The thicker portion provides structural integrity where needed, while the thinner portion reduces overall package height, effectively using dimensional variation to resolve the contradiction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the leadframe pad is divided into two portions for contacting two die terminals, then electrical connections are established, but the pad is remote from PCB and cannot serve as heat sink attachment point

Engineering Contradiction:
Improveelectrical connectionVSAvoidheat dissipation capability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The leadframe is designed to serve multiple functions: it provides electrical connection through contact pads, structural support through its framework, and thermal management through an exposed back surface that can be attached to a heat sink. The back surface of the leadframe, being metal and thermally conductive, acts as both a mechanical support structure and a thermal path to dissipate heat from the power MOSFET chip.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Temperature

If clips are made thick enough to attach heat sink, then thermal management is improved, but the three-strata structure increases package thickness

Engineering Contradiction:
Improveheat dissipationVSAvoidpackage thickness
Core Design Contradiction:
TemperatureVSLength of moving object

Solution Approach 1:

The invention removes the intermediate clip structure entirely, eliminating the need for a third stratum in the assembly. The power MOSFET chip is mounted directly to the leadframe, which itself can be attached to the heat sink, creating a more efficient two-layer thermal path and reducing overall package thickness while maintaining heat dissipation capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution results in a package thickness of less than 0.5 mm, capable of handling up to 35 A with enhanced thermal and electrical efficiencies, and allows for direct implementation onto printed circuit boards without modifying the footprint.

Implementation Method 1

the thicker portion is exposed for cooling... capable of handling up to 35 A with enhanced thermal and electrical efficiencies

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9779967B2Ultra-thin power transistor and synchronous buck converter having customized footprint
Publication Date: 2017.10.03 TEXAS INSTRUMENTS INC
  • US9779967B2 patent drawing
  • US9779967B2 patent drawing
  • US9779967B2 patent drawing

AI summary

A power field-effect transistor package is fabricated. A leadframe including a flat plate and a coplanar flat strip spaced from the plate is provided. The plate has a first thickness and the strip has a second thickness smaller than the first thickness. A field-effect power transistor chip having a third thickness is provided. A first and second contact pad on one chip side and a third contact pad on the opposite chip side are created. The first pad is attached to the plate and the second pad to the strip. Terminals are concurrently attached to the plate and the strip so that the terminals are coplanar with the third contact pad. The thickness difference between plate and strip and spaces between chip and terminals is filled with an encapsulation compound having a surface coplanar with the plate and the opposite surface coplanar with the third pad and terminals. The chip, leadframe and terminals are integrated into a package having a thickness equal to the sum of the first and third thicknesses.