Ultra-thin Semiconductor Device PCB Compatibility
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Solution Overview
Problem
Existing semiconductor devices for DC-DC converters face issues with high power consumption, heat dissipation, and on-resistance, as well as incompatibility with conventional PCB layouts due to exposed metal electrodes and difficulties in adjusting the gate electrode, and the thinning process risks wafer cracking.
Innovation Solution
A method for preparing a small and ultra-thin power semiconductor device involves a lead frame structure with optimized chip mounting units, where the semiconductor chip is attached with source and gate electrodes on separate pads, covered by a plastic packaging layer, and then thinned to reduce on-resistance, with a metal layer formed for electrical contact, and the device is processed to expose necessary surfaces for compatibility with PCBs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the semiconductor wafer is thinned to reduce on-resistance, then the on-resistance decreases, but the wafer may crack
Solution Approach 1:
The wafer is thinned before the power device is fully formed, allowing controlled reduction of wafer thickness to minimize on-resistance while maintaining structural integrity through subsequent support structures
Solution Approach 2:
A support structure is introduced during the thinning process to prevent wafer cracking while allowing the wafer to be thinned to the desired thickness for low on-resistance
2Temperature
If metal electrodes are exposed from the plastic package for heat dissipation, then heat dissipation improves, but the device becomes incompatible with conventional PCB layouts
Solution Approach 1:
Instead of exposing metal electrodes upward from the package top, the gate electrode is extended to the package edge and made coplanar with the bonding pad layout, inverting the conventional approach to achieve PCB compatibility while maintaining electrical connection
Solution Approach 2:
The gate electrode serves dual functions: as the control terminal of the power device and as a bonding pad interface for PCB mounting, making the device compatible with conventional PCB layouts
3Device complexity
If the gate electrode is fixed on the semiconductor chip, then the device structure is simple, but it is difficult to adjust the gate electrode position to match PCB bonding pad layout
Solution Approach 1:
The gate electrode is designed with adjustable positioning capability during the packaging process, allowing it to be moved to different locations on the package edge to match various PCB bonding pad layouts while maintaining its electrical connection to the chip
Data Source
AI summary
A small and ultra-thin power semiconductor device and a preparation method are disclosed. The device includes a chip mounting unit with a plurality of pads with a plate arranged on top surface of each pad; a semiconductor chip flipped and attached on the chip mounting unit, where the electrodes at the front of the chip are electrically connected to the pads; a plastic packaging body covering the chip mounting units and the chip, where the top surface of the plate and the back surface of the chip are exposed out from top surface of the plastic packaging body and the bottom surfaces of the pads are exposed out of the bottom surface of the plastic packaging body; a plurality of top metal segments arranged on the top surface of the plastic packaging body and electrically connected to the top surface of each plate and the back surface of the chip.