Micromachined Ultrasonic Transducer Array With Integrated Demultiplexing
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Solution Overview
Problem
Current micromachined ultrasonic transducers (MUTs) are costly and difficult to fabricate in large areas due to their reliance on passive matrices and wafer bonding, which limits the realization of three-dimensional array images.
Innovation Solution
An electronic device with a sonic transducer array that includes a piezoelectric or capacitive micromachined ultrasonic transducer (PMUT or CMUT) integrated on a substrate, utilizing a demultiplexer with transistors and a driving circuit to enable efficient large-area production, reducing costs and enabling three-dimensional imaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If passive matrix-based MUTs are fabricated on wafers, then traditional fabrication processes can be used, but the production cost increases and large-area fabrication becomes difficult
Solution Approach 1:
The patent merges the MUT fabrication process with the semiconductor circuit fabrication process by forming the piezoelectric layer directly on the semiconductor substrate using the same etching and deposition processes. This integration eliminates the need for separate wafer bonding steps and reduces overall manufacturing complexity while enabling large-area production.
Solution Approach 2:
The semiconductor substrate serves multiple functions: it acts as both the circuit carrier and the MUT support structure. The piezoelectric layer is formed using the same fabrication processes as the semiconductor circuits, making the manufacturing process universal and applicable to both circuit and transducer fabrication.
2Reliability
If wafer bonding is used to integrate MUT and external circuits, then integration is achieved, but production cost increases and fabrication difficulty increases
Solution Approach 1:
The patent combines the MUT and external circuits into a single integrated structure on one substrate, eliminating the need for separate wafer bonding processes. The piezoelectric layer and semiconductor circuits are formed in the same fabrication sequence, ensuring reliable integration while simplifying manufacturing.
3Manufacturing precision
If traditional MUT fabrication is used, then standard processes are maintained, but large-area production capability is limited
Solution Approach 1:
The patent transitions from traditional planar wafer fabrication to a three-dimensional integrated structure where the piezoelectric layer is formed vertically on the semiconductor substrate. This dimensional change enables large-area transducers while maintaining fabrication precision through controlled layer deposition and etching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for cost-effective large-area fabrication of MUTs, facilitating three-dimensional imaging and applications such as distance detection, fingerprint biometrics, gesture detection, and ultrasonic imaging.
Implementation Method 1
forming a piezoelectric layer on the sacrificial layer
Implementation Method 2
forming a lower electrode on the driving layer, forming an upper electrode on the sacrificial layer
Data Source
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AI summary
An electronic device is provided. The electronic device includes multiple transducer pixels. Each of the transducer pixels includes a sonic transducer, a demultiplexer electrically connected to the sonic transducer, a driving line electrically connected to the sonic transducer, a switching line electrically connected to the demultiplexer, and a reading line electrically connected to the demultiplexer. The driving line is used to provide a driving signal to the sonic transducer to emit sonic waves. The switching line is used to turn on the demultiplexer to output the sensing signal received by the sonic transducer to the reading line.