Ultrasonic Probe Flip-Chip Bonding Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in ultrasonic probes is aligning numerous electrode pads on CMUT chips with flexible substrates during flip-chip bonding, which increases probe size and hinders measurement accuracy due to lens thickness variations affecting ultrasonic wave attenuation.
Innovation Solution
The design features a semiconductor chip with a convex CMUT cell region and a flexible substrate with overlapping connection conductor portions, where the electrode pad connection surface is lower than the lower electrode surface, facilitating alignment and reducing probe size by minimizing lens thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the pad diameter of the electrode pads is increased to reduce alignment difficulty during flip-chip bonding, then the alignment ease is improved, but the chip size increases and the probe becomes larger
Solution Approach 1:
The patent applies preliminary action by forming a protruding portion on the electrode pad connection surface before the bonding process. This protruding portion serves as a pre-established alignment feature that guides the connection conductor portions into proper alignment during flip-chip bonding, eliminating the need to increase pad diameter for alignment purposes.
Solution Approach 2:
The patent segments the electrode pad connection surface by creating a distinct protruding portion that separates the alignment function from the electrical connection function. This segmentation allows the alignment feature to be independent of the pad diameter, enabling precise alignment without increasing overall chip size.
2Strength
If the lens thickness of the portion corresponding to the cell region is increased, then the structural support is improved, but the attenuation of ultrasonic waves becomes large and measurement precision deteriorates
Solution Approach 1:
The patent applies local quality by creating a non-uniform lens thickness distribution. The lens thickness is minimized specifically in the region corresponding to the cell array to reduce ultrasonic wave attenuation and improve measurement precision, while other regions of the lens can maintain sufficient thickness for structural support.
Solution Approach 2:
The patent addresses the structural support issue by transitioning to a three-dimensional solution through the protruding portion on the electrode pad connection surface, which provides mechanical support and alignment functionality without increasing the lens thickness in the ultrasonic path, thereby maintaining measurement precision.
3Ease of manufacture
If wire bonding is used to electrically connect the CMUT chip and flexible substrate, then the manufacturing process is simplified, but a height difference occurs between the chip front surface and wire loop apex causing lens thickness variation
Solution Approach 1:
The patent inverts the conventional approach by using flip-chip bonding instead of wire bonding. This inversion eliminates the height difference problem caused by wire loops, as the connection is made through protruding portions that maintain a flat connection surface, ensuring uniform lens thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration simplifies flip-chip bonding, reduces probe size, and enhances measurement accuracy by minimizing ultrasonic wave attenuation and improving acoustic pressure and frequency.
Implementation Method 1
a semiconductor chip (CMUT chip) having capacitive micro-machined ultrasonic transducers (CMUT) formed therein
Data Source
AI summary
An ultrasonic probe includes a semiconductor chip in which an ultrasonic transducer is formed and an electrode pad electrically connected to an upper electrode or a lower electrode of the ultrasonic transducer is provided and a flexible substrate in which a bump electrically connected to the electrode pad is provided and the bump is disposed in a portion overlapping with a stepped portion of the semiconductor chip. Further, a height of a connection surface of the electrode pad of the semiconductor chip connected to the bump is lower than a height of a lower surface of the lower electrode.