Ultrasonic Welded Semiconductor Package for EV Thermal Management

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Solution Overview

Problem

Conventional semiconductor packages face challenges in heat radiation efficiency and structural integrity due to high thermal resistance and increased weight and cost associated with thick copper materials, particularly when applied to electric vehicles.

Innovation Solution

The use of ultrasonic welding to join substrates made of materials like aluminum and copper, with embossing grooves and conductive adhesives, to create a semiconductor package that reduces weight and cost while enhancing heat radiation and structural strength.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If thick copper material is used to radiate heat, then heat radiation effect is improved, but weight and material cost increase

Engineering Contradiction:
Improveheat radiation effectVSAvoidweight of semiconductor package
Core Design Contradiction:
TemperatureVSWeight of moving object

Solution Approach 1:

The patent uses a composite substrate structure consisting of a ceramic layer sandwiched between two copper layers (DBC substrate). This composite structure provides effective heat radiation pathways while significantly reducing the amount of copper material needed compared to using thick copper alone, thereby reducing weight while maintaining thermal performance.

Inventive Principle:
Principle #40Composite materials

2Reliability

If soldering is used to join copper layers and conducting wires, then electrical connection is achieved, but structural strength decreases at high temperature

Engineering Contradiction:
Improveelectrical connectionVSAvoidstructural joining strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent replaces the soldering process with ultrasonic welding for joining the copper layers and conducting wires to the substrate. Ultrasonic welding uses mechanical vibration energy to create strong metallurgical bonds without requiring solder, providing superior structural strength and high-temperature reliability while maintaining electrical connectivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Temperature

If DBC substrate with ceramic layer is used, then thermal diffusion is improved, but stress from temperature characteristics reduces reliability

Engineering Contradiction:
Improvethermal diffusionVSAvoidreliability of semiconductor chip
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent modifies the substrate structure by creating an embossing groove pattern on the ceramic layer surface and optimizing the thickness ratios of copper and ceramic layers. These parameter changes reduce thermal stress concentration and improve stress distribution, enhancing reliability while preserving the thermal diffusion benefits of the DBC substrate structure.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces battery consumption and material costs while improving heat radiation and structural integrity, making it suitable for electric vehicles.

Implementation Method 1

at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding

Methodology Applied
Scientific EffectUltrasonic welding: Ultrasonic Vibration

Data Source

PatentUS11417577B2Semiconductor package and method of manufacturing the same
Publication Date: 2022.08.16 JMJ KOREA CO LTD
  • US11417577B2 patent drawing
  • US11417577B2 patent drawing
  • US11417577B2 patent drawing

AI summary

Provided is a semiconductor package including: at least one first substrate including at least one first substrate terminal extended therefrom; at least one second substrate joined to the upper surface of the first substrate using ultrasonic welding; at least one semiconductor chip joined to the upper surface of the second substrate; a package housing covering the at least one semiconductor chip and an area of the second substrate, where ultrasonic welding is performed; and terminals separated from the first substrate, electrically connected to the at least one semiconductor chip through electric signals, and at least one of them is exposed to the outside of the package housing, wherein a thickness of the terminals formed inside the package housing is same as or smaller than a thickness of the first substrate and the second substrate includes at least one embossing groove on the upper surface thereof.