UMA Node Control for Direct Memory Access in Storage Clusters
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Solution Overview
Problem
Non-Uniform Memory Access (NUMA) networks in server networks result in unpredictable memory access times and bandwidth degradation due to server CPU control over memory access paths, leading to performance bottlenecks and failures.
Innovation Solution
Implementing a Uniform Memory Access (UMA) network architecture that eliminates server CPU control from memory access paths by using UMA nodes with integrated UMA memory units, node control devices, and a cluster-wide address management system to facilitate direct access across the network without server intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If NUMA architecture is used with server CPU control over memory access paths, then each server can control its own memory, but memory access time becomes unpredictable and bandwidth degrades
Solution Approach 1:
The patent extracts the memory access control function from the server CPU and relocates it to a dedicated memory access controller. This separation removes the CPU from the memory access path, eliminating the unpredictability caused by CPU scheduling decisions and enabling consistent, controlled access timing across the network.
Solution Approach 2:
The patent introduces a memory access controller as an intermediary component between servers and memory resources. This mediator manages all memory access requests, arbitrates between competing accessors, and ensures predictable timing by controlling the access path independently of server CPU operations.
2Adaptability or versatility
If NUMA architecture with RDMA access is used, then remote memory access is enabled, but access bandwidth degrades by 60-80% depending on distance
Solution Approach 1:
The patent implements a unified addressing scheme and centralized control that makes all memory locations equally accessible regardless of physical location. The memory access controller manages address translation and routing to eliminate the bandwidth degradation that occurs in hierarchical NUMA architectures where remote accesses traverse multiple control boundaries.
3Reliability
If server CPU controls memory access paths, then memory access permission can be managed, but performance bottlenecks occur due to CPU involvement
Solution Approach 1:
The patent extracts the permission control function from the server CPU and implements it in the memory access controller. This allows permission management to continue while removing the CPU performance bottleneck, as the controller handles authorization decisions independently of server processing loads.
4Device complexity
If NUMA architecture is used, then each server has dedicated memory, but system fails if owner server fails
Solution Approach 1:
The patent implements a memory access controller that can service requests from any server for any memory resource, making the memory system universally accessible rather than exclusively owned. This multi-functional access control enables failover capabilities where alternative servers can access memory if the original owner fails, improving system reliability.
Data Source
AI summary
A node in a network including a plurality of nodes comprises persistent memory; non-persistent memory, a node control device operatively coupled to the persistent memory and the non-persistent memory, a local interface for interfacing with the local server in the UMA node, and a network interface for interfacing with other nodes. The node control device is configured to translate between a local unified memory access (UMA) address space accessible by applications running on a local server and a global UMA address space that is mapped to a physical UMA address space. The physical UMA address space includes physical address spaces associated with different UMA nodes in the cluster of UMA nodes. Thus, a server in the UMA network can access the physical address spaces at other UMA nodes without going through the servers in the other UMA nodes.