Unary-Coded MAC Circuit Using Time-Division Multiplexing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Stochastic computing faces challenges in efficiently performing multiply-accumulate (MAC) operations due to the complexity of accumulating individual multiplication results, especially when operands are represented by unary coded bitstreams.
Innovation Solution
The proposed circuitry employs multiplexer and vector quantizer circuits to time division multiplex unary coded operands based on weighting signals, integrating and encoding the output into a unary coded signal using pulse width or consecutive edge modulation to perform MAC operations efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional accumulation methods are used for MAC operations in stochastic computing, then the operation can be completed, but the complexity of the circuit increases significantly
Solution Approach 1:
The patent employs periodic action by using a multiplexer to time-division multiplex the selection of unary-coded input signals. The multiplexer periodically switches between different input signals based on control signals from the vector quantizer, allowing multiple operands to be processed sequentially rather than requiring complex parallel accumulation circuitry. This periodic switching reduces circuit complexity while maintaining MAC operation functionality.
Solution Approach 2:
The patent introduces an intermediary mechanism by using a multiplexer as a mediator between the unary-coded input signals and the accumulation process. Instead of directly accumulating multiple product results requiring complex circuitry, the multiplexer acts as an intermediary that selectively routes individual input signals to the output based on control signals, simplifying the overall circuit architecture while enabling MAC operations.
2Reliability
If multiple unary-coded input signals are processed simultaneously, then the MAC operation result is accurate, but the power consumption increases
Solution Approach 1:
The patent reduces power consumption by implementing periodic action through time-division multiplexing. The multiplexer processes unary-coded input signals sequentially rather than simultaneously, activating only one input path at a time based on control signals from the vector quantizer. This periodic switching reduces the number of active circuit components at any given moment, thereby lowering power consumption while maintaining computational accuracy through proper timing and integration.
3Ease of manufacture
If simple AND gate multiplication is used, then the multiplication operation is simple, but the accumulate operation becomes complicated
Solution Approach 1:
The patent uses an intermediary approach by introducing a multiplexer as a mediating component between the simple AND gate multiplication and the accumulation process. The multiplexer selectively routes the outputs from multiple AND gate multiplication operations in a time-division manner, controlled by signals from a vector quantizer. This intermediary mechanism transforms the complex parallel accumulation problem into a simpler sequential selection process, maintaining the simplicity of individual multiplication operations while reducing the complexity of the overall accumulation function.
Data Source
AI summary
The present disclosure relates to circuitry for performing a multiply-accumulate (MAC) operation. The circuitry comprises a first multiplexer having a plurality of inputs for receiving a plurality of unary-coded input signals representing operands of the MAC operation and an output for outputting a multiplexer output signal representing a result of the MAC operation and a first vector quantizer configured to receive a plurality of weighting signals, each representing a proportion of a computation time period for which a respective one of the unary-coded input signals should be selected by the multiplexer and to output a first selector signal to the multiplexer to cause the multiplexer to select each of the input signals in accordance with the plurality of weighting signals.