Unbalanced Table Regions for Flash Memory Data Access

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Solution Overview

Problem

In memory devices like Flash memory, the management of accessing data is complicated due to the mixing of invalid and valid data within storage blocks, leading to increased write amplification and potential side effects during garbage collection, which existing methods fail to address effectively without introducing additional issues.

Innovation Solution

A method and apparatus for data access management using unbalanced table regions in a memory device, where the memory controller determines whether data is hot or cold based on access frequency and uses this classification to select active blocks for writing, updating temporary physical-to-logical address mapping tables to optimize data storage and retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If garbage collection is performed to release storage space when invalid and valid data are mixed in the same block, then storage space is released for further use, but write amplification is increased

Engineering Contradiction:
Improvestorage spaceVSAvoidwrite amplification
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent segments the address mapping table into multiple regions (first region for hot data, second region for cold data, third region for invalid data) within the same physical block. This allows the memory controller to manage different types of data separately, releasing storage space for invalid data without requiring full garbage collection of the entire block, thereby reducing write amplification while maintaining storage space availability.

Inventive Principle:
Principle #1Segmentation

2Device complexity

If traditional address mapping is used without data classification, then the memory management is simpler, but performance deteriorates due to increased garbage collection operations

Engineering Contradiction:
Improveaddress mapping structureVSAvoidmemory access performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies local quality by creating different regions within the address mapping table with different characteristics: the first region handles hot data with frequent updates, the second region handles cold data with less frequent access, and the third region tracks invalid data. This localized differentiation allows optimized management strategies for each region, improving overall memory access performance while maintaining manageable complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12147670B2Method and apparatus for performing data access management of memory device in predetermined communications architecture with aid of unbalanced table regions
Publication Date: 2024.11.19 SILICON MOTION INC
  • US12147670B2 patent drawing
  • US12147670B2 patent drawing
  • US12147670B2 patent drawing

AI summary

A method for performing data access management of a memory device in a predetermined communications architecture with aid of unbalanced table regions and associated apparatus are provided. The method may include: utilizing a memory controller to receive a first command from a host device through a transmission interface circuit of the memory controller, where the first command carries first information related to first data to be written; performing a first checking operation on the first information to generate a first determination result; determining a selected active block among multiple active blocks according to the first determination result and according to at least one predetermined rule; and receiving the first data with the selected active block, and updating a temporary physical-to-logical (P2L) address mapping table corresponding to the selected active block among multiple temporary P2L address mapping tables of different sizes, for generating/updating P2L address mapping table for performing subsequent processing.