Uncore Frequency Domain Scaling for Power Reduction
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Solution Overview
Problem
Power management techniques for reducing power consumption in processor cores are not applicable to non-core portions due to complex protocol dependencies, leading to inefficiencies in multicore processors, especially in systems with multiple sockets and integrated components.
Innovation Solution
Implementing a freeze mode for uncore frequency domains that allows for dynamic scaling of frequency and voltage without performing a full drain of transactions, using global clock synchronization and clock gating to change frequencies while maintaining pending transactions and state, thus avoiding architectural flow dependencies and deadlocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power management techniques for cores are applied to non-core portions, then power consumption can be reduced, but complex protocol dependencies and deadlocks occur
Solution Approach 1:
The patent divides the processor into separate power domains: core power domains and uncore power domains. Each domain can be independently controlled and managed. The uncore power domain is further segmented into multiple frequency domains that can be independently scaled. This segmentation allows power management techniques to be applied to non-core portions without affecting core operations, thereby avoiding protocol dependencies and deadlocks while still achieving power reduction.
Solution Approach 2:
The patent implements dynamic frequency scaling and voltage adjustment for uncore components based on actual workload demands. The system can dynamically transition uncore frequency domains between active and frozen states, adjusting operating frequencies and voltages in real-time. This dynamic approach allows the system to reduce power consumption during low-utilization periods while maintaining full performance when needed, without creating static protocol conflicts.
2Loss of energy
If frequency scaling is implemented in uncore components, then power consumption decreases, but transaction draining causes performance degradation
Solution Approach 1:
The patent performs preliminary actions by freezing uncore frequency domains and draining transactions in advance before transitioning to lower power states. The system identifies when uncore components can be frozen, pre-drains pending transactions to maintain data integrity, and then safely transitions to reduced frequency states. This preliminary draining approach minimizes performance impact by preparing the system beforehand rather than interrupting operations during active transactions.
Solution Approach 2:
The patent changes operating parameters (frequency and voltage) of uncore components dynamically based on workload conditions. The system monitors utilization metrics and adjusts frequency scaling parameters accordingly, transitioning between different power states. By changing parameters smoothly and conditionally rather than abruptly, the system achieves power reduction while maintaining transaction processing performance during high-utilization periods.
3Loss of energy
If uncore frequency is reduced, then power consumption is lowered, but cache bandwidth and memory latency are affected
Solution Approach 1:
The patent applies different quality levels (performance characteristics) to different parts of the uncore based on their specific functional requirements and utilization patterns. Critical components that require high performance maintain higher frequency operation, while less critical components can be scaled down more aggressively. This localized quality approach ensures that cache bandwidth and memory latency are optimized for specific workloads while achieving overall power reduction across the uncore.
Solution Approach 2:
The patent implements dynamic frequency adjustment for uncore components, allowing the system to transition between different performance and power states based on real-time workload demands. When high cache bandwidth or low memory latency is required, the system maintains higher uncore frequencies. When workloads are light, the system reduces frequencies to save power. This dynamic adaptation allows the system to optimize the trade-off between power consumption and performance metrics like cache bandwidth and memory latency on a per-workload basis.
Data Source
AI summary
In one embodiment, the present invention includes a multicore processor having a variable frequency domain including a plurality of cores and at least a portion of non-core circuitry of the processor. This non-core portion can include a cache memory, a cache controller, and an interconnect structure. In addition to this variable frequency domain, the processor can further have a fixed frequency domain including a power control unit (PCU). This unit may be configured to cause a frequency change to the variable frequency domain without draining the non-core portion of pending transactions. Other embodiments are described and claimed.