Under Bump Protrusion Structure for Reliable Semiconductor Packages
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Solution Overview
Problem
Existing semiconductor packages face challenges in reliability due to stress applied from thermal expansion coefficient differences, leading to potential cracks and delamination of the under bump pattern from the insulating layer.
Innovation Solution
The semiconductor package incorporates an under bump pattern with a protrusion that protrudes into the insulating layer, increasing the contact area and reducing stress by dispersing thermal mismatch stress, thereby stabilizing the interface between the under bump pattern and the insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the under bump pattern is directly connected to the insulating layer without additional structures, then the device complexity is low, but the reliability deteriorates due to stress concentration and delamination
Solution Approach 1:
The protrusion structure is pre-formed in the under bump pattern before final assembly, creating an advance stress distribution pathway that prevents delamination during thermal cycling. This preliminary structural preparation ensures reliable interface bonding without requiring complex additional components.
Solution Approach 2:
The under bump pattern transitions from a planar two-dimensional structure to a three-dimensional structure with vertical protrusions. This dimensional change increases the contact area and creates mechanical interlocking with the insulating layer, significantly improving interface stability and stress distribution.
2Stress or pressure
If the contact area between under bump pattern and insulating layer is increased, then the stress is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
The protrusion height and width parameters are optimized to achieve the desired stress reduction effect. By carefully controlling these geometric parameters, the contact area is increased to distribute thermal mismatch stress while maintaining feasible manufacturing tolerances for alignment.
Data Source
AI summary
A semiconductor package includes a redistribution substrate including a first surface and a second surface which are opposite to each other, a semiconductor chip on the first surface of the redistribution substrate, and a connection terminal on the second surface of the redistribution substrate. The redistribution substrate includes an insulating layer, a redistribution pattern in the insulating layer, and an under bump pattern between the redistribution pattern and the connection terminal. The under bump pattern includes a via portion penetrating the insulating layer and connected to the redistribution pattern, and a protrusion protruding into the insulating layer.