Under-Bump Via Geometry for Reliable Semiconductor Package Contacts

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Solution Overview

Problem

Conventional semiconductor packages face challenges in reliability due to issues with the connection between conductive terminals and redistribution patterns, leading to potential contact failures during thermal treatment processes.

Innovation Solution

The semiconductor package incorporates an under-bump pattern with a via portion and a wire portion, where the bottom surface of the via portion has a curved recessed shape, enhancing alignment and contact with conductive terminals, and includes a redistribution substrate with insulating layers and redistribution patterns to improve connection reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional flat under-bump pattern is used, then the manufacturing process is simple, but the connection reliability between conductive terminals and redistribution patterns deteriorates during thermal treatment

Engineering Contradiction:
Improveconnection reliabilityVSAvoidunder-bump pattern complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The under-bump pattern's bottom surface is designed with a curved recessed shape instead of a flat surface. This curvature allows the conductive terminal to maintain better contact during thermal treatment by accommodating dimensional changes and reducing stress concentration, thereby improving connection reliability without significantly complicating the manufacturing process.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Reliability

If the under-bump pattern shrinks during thermal treatment, then thermal stress is reduced, but contact between conductive terminals and redistribution patterns is lost

Engineering Contradiction:
Improvecontact maintenanceVSAvoiddimensional stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The curved recessed shape of the under-bump pattern's bottom surface is designed in advance to accommodate the shrinkage that occurs during thermal treatment. This pre-designed geometric feature acts as a cushion that maintains contact between the conductive terminal and redistribution pattern even when dimensional changes occur, preventing contact loss while managing thermal stress.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If bonding wires are used to connect semiconductor chip to PCB, then electrical connection is achieved, but connection reliability deteriorates due to potential contact failures

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidcontact failure risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The invention replaces the mechanical bonding wire connection system with a direct electrical connection system using conductive terminals and under-bump patterns. This substitution eliminates the mechanical weaknesses of bonding wires (such as wire bonding failures and fatigue) by creating a more robust direct electrical pathway between the semiconductor chip and PCB through the curved under-bump structure that maintains reliable contact during thermal treatment.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12183664B2Semiconductor package
Publication Date: 2024.12.31 SAMSUNG ELECTRONICS CO LTD
  • US12183664B2 patent drawing
  • US12183664B2 patent drawing
  • US12183664B2 patent drawing

AI summary

A semiconductor package may include a redistribution substrate, a semiconductor chip mounted on a top surface of the redistribution substrate, and a conductive terminal provided on a bottom surface of the redistribution substrate. The redistribution substrate may include an under-bump pattern including a via portion in contact with the conductive terminal and a wire portion on the via portion and an insulating layer covering top and side surfaces of the under-bump pattern. A central portion of a bottom surface of the via portion may be provided at a level higher than an edge portion of the bottom surface of the via portion.