Display Panel With Under-Display Optical Detection and Luminance Compensation

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Solution Overview

Problem

Display devices with integrated optical electronic devices face challenges in maintaining display area size and luminance uniformity due to the presence of optical electronic devices, which require light reception and result in increased bezel size or design disadvantages.

Innovation Solution

A display panel design with a light transmission structure that locates optical electronic devices under the display area, incorporating subpixels with luminance difference compensation structures to maintain image quality and reduce bezel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an optical electronic device is located in the front portion of the display device to receive incident light, then the optical electronic device can be effectively exposed to light, but the bezel size must be increased or a notch/hole must be formed in the display area

Engineering Contradiction:
Improvelight reception capabilityVSAvoiddisplay area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent inverts the conventional placement of the optical electronic device from the front surface to the rear surface of the display panel. The optical electronic device is positioned in the rear portion of the housing, allowing it to receive light that passes through the display panel from the front, thereby eliminating the need for increased bezel or display area compromises.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent transitions the optical electronic device from a two-dimensional front-surface placement to a three-dimensional rear-surface integration. By moving the device to the rear portion of the display panel and utilizing the depth dimension, the system maintains full front display area while enabling light reception through the panel structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If an optical electronic device is placed under the display area, then the display area size is maintained, but the optical electronic device is not exposed in the front surface and cannot normally receive light

Engineering Contradiction:
Improvedisplay areaVSAvoidlight reception capability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The display panel itself serves as an intermediary medium that allows light to pass from the front surface to the rear surface where the optical electronic device is located. This intermediary structure enables the device to receive light indirectly through the panel rather than requiring direct exposure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution utilizes the third dimension (depth) by positioning the optical electronic device in the rear portion of the display panel rather than on the front surface. This dimensional transition allows the device to be concealed while still accessing light through the panel structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If the number of subpixels per unit area is increased in the optical area, then the display resolution is improved, but the luminance difference between the optical area and non-optical area increases

Engineering Contradiction:
Improvedisplay resolutionVSAvoidluminance uniformity
Core Design Contradiction:
Measurement precisionVSIllumination intensity

Solution Approach 1:

The patent applies different subpixel configurations to different areas of the display. The optical area (where the optical electronic device is located) has a different number of subpixels per unit area compared to the non-optical area, optimizing each region for its specific function while managing luminance characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent adjusts the subpixel density parameter in the optical area to balance resolution requirements with luminance uniformity. By changing the number of subpixels per unit area in the optical area, the system achieves adequate resolution while reducing the luminance difference between optical and non-optical regions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables normal light reception and detection by optical electronic devices without reducing the display area, preventing luminance differences and allowing for reduced bezel size and enhanced design freedom.

Implementation Method 1

The gate electrode of the drive TFT and the corresponding scan line may be capacitively coupled to each other

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

a light emitting element connected to a fourth node and capable of emitting light in response to a driving current

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentEP4141859B1Display device
Publication Date: 2025.08.06 LG DISPLAY CO LTD
  • EP4141859B1 patent drawingFigure 1A
  • EP4141859B1 patent drawingFigure 1B
  • EP4141859B1 patent drawingFigure 1C

AI summary

A display device (100) includes subpixels (SP) disposed in a display area (DA) for displaying an image. Each subpixel (SP) includes a light emitting element (ED); a driving transistor (DRT) for driving the light emitting element (ED); and a transistor whose turn-on or turn-off may be controlled by a gate signal supplied through a gate line. The subpixels (SP) includes a subpixel (SP) disposed in a specific area in the display area (DA), and such subpixel (SP) may include a compensation capacitor formed by overlapping of a gate node of the driving transistor (DRT) or a connection pattern (CP) connected to the gate node of the driving transistor (DRT) and the gate line. A voltage level of the gate signal supplied through the gate line is changed to a lower voltage level at a timing at which a data voltage (Vdata) or a voltage resulting from changing of the data voltage (Vdata) is applied to the gate node of the driving transistor (DRT).