Under Voltage Detection Circuit for Dynamic Performance Throttling

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Solution Overview

Problem

Integrated circuits often operate within conservative voltage and clock frequency limits due to guard bands, which can restrict performance and processing throughput, despite the potential for higher operation within these limits.

Innovation Solution

An under voltage detection circuit that compares supply voltage to thresholds, asserts a throttling signal to manage clock frequency and voltage, allowing the IC to operate in higher performance states by adjusting performance states based on voltage stability and frequency of threshold crossings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If guard bands are implemented between maximum supply voltage and actual supplied voltage, then reliability is improved, but processing throughput deteriorates

Engineering Contradiction:
ImprovereliabilityVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic performance state transitions that allow the IC to operate in accelerated performance states exceeding global guard band ratings when voltage conditions permit. The system dynamically adjusts between conservative operation (within guard bands) and aggressive operation (exceeding guard bands) based on real-time voltage stability, resolving the contradiction between reliability and processing throughput by making the operating point adaptive rather than static

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operating parameters (voltage and clock frequency) based on detected voltage conditions. When voltage remains stable above thresholds, the system permits operation at higher voltages and clock frequencies than rated with guard band. When voltage droops below thresholds, the system transitions to lower performance states, thus optimizing both reliability and throughput through parameter adaptation

Inventive Principle:
Principle #35Parameter changes

2Reliability

If clock frequency is limited to a value less than maximum operating frequency, then reliability is improved, but processing throughput deteriorates

Engineering Contradiction:
ImprovereliabilityVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent enables dynamic clock frequency adjustment based on voltage detection. The system can operate at clock frequencies exceeding the maximum rated frequency when voltage conditions are favorable, and automatically reduce frequency when voltage droops occur. This dynamic approach resolves the contradiction by allowing the clock frequency to adapt to real-time voltage conditions rather than being statically limited

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs feedback through voltage detection circuits that monitor supply voltage and provide signals to control performance state transitions. This feedback mechanism enables the system to automatically adjust clock frequency based on voltage stability, permitting higher frequencies when voltage is stable and reducing frequency when voltage droops, thus resolving the reliability-throughput contradiction

Inventive Principle:
Principle #23Feedback

3Productivity

If the IC operates in accelerated performance state exceeding guard band ratings, then processing throughput is improved, but voltage stability deteriorates

Engineering Contradiction:
Improveprocessing throughputVSAvoidvoltage stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The patent implements preliminary voltage detection and threshold monitoring before permitting operation in accelerated performance states. The system detects voltage conditions in advance and only allows exceeding guard band ratings when voltage stability is confirmed. This preliminary action prevents voltage instability by ensuring voltage conditions are favorable before entering high-performance states

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses feedback from voltage detection circuits to control transitions into and out of accelerated performance states. When voltage droops below detection thresholds, the system automatically transitions to lower performance states, providing feedback-based voltage stability control that resolves the contradiction between throughput and voltage stability

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables integrated circuits to operate at higher voltages and clock frequencies, enhancing processing throughput while preventing voltage droops, thus optimizing performance and power management.

Implementation Method 1

an under voltage protection circuit having first and second comparators configured to compare a supply voltage to first and second voltage thresholds, respectively

Methodology Applied
Scientific EffectVoltage comparison:

Data Source

PatentUS9658634B2Under voltage detection and performance throttling
Publication Date: 2017.05.23 APPLE INC
  • US9658634B2 patent drawing
  • US9658634B2 patent drawing
  • US9658634B2 patent drawing

AI summary

An under voltage detection circuit and method of operating an IC including the same is disclosed. In one embodiment, an IC includes an under voltage protection circuit having first and second comparators configured to compare a supply voltage to first and second voltage thresholds, respectively, with the second voltage threshold being greater than the first. A logic circuit is coupled to receive signals from the first and second comparators. During operation in a high performance state by a corresponding functional circuit, the logic circuit is configured to cause assertion of a throttling signal responsive to an indication that the supply voltage has fallen below the first threshold. A clock signal provided to the functional circuit may be throttled responsive to the indication. If the supply voltage subsequently rises to a level above the second threshold, the throttling signal may be de-asserted.