Undercut Contact Hole in LCD Array Substrate
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Solution Overview
Problem
The existing array substrates for liquid crystal display (LCD) devices face issues with reduced aperture ratio and transmittance due to misalignment during the fabrication process, leading to disconnection of pixel electrodes and increased number of masking processes, which affects viewing angle and luminance performance, especially as the size of the LCD increases.
Innovation Solution
The use of a dual-structure insulating film with a high temperature silicon nitride film and a low temperature silicon nitride film to create an undercut contact hole, allowing for a pixel electrode connection pattern within the contact hole and separate common electrodes on the second insulating film, reducing overlay margins and improving the area of the common electrode, thereby enhancing aperture ratio and transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional contact hole structure is used, then the fabrication process is simpler, but the aperture ratio and transmittance are reduced due to misalignment
Solution Approach 1:
The contact hole structure transitions from a simple vertical hole to an undercut shape with wider middle section, utilizing dimensional change to provide alignment tolerance and improve manufacturing precision without increasing process complexity
Solution Approach 2:
The insulating film is divided into two separate layers (first and second insulating films) with different etching rates, allowing the contact hole to be formed with an undercut profile that improves alignment precision while maintaining fabrication simplicity
2Manufacturing precision
If overlay margins are increased to prevent misalignment, then manufacturing precision improves, but the area of common electrode is reduced
Solution Approach 1:
The contact hole adopts an undercut shape with a wider middle section, creating dimensional tolerance that reduces the need for overlay margins while maintaining alignment precision, thereby preserving common electrode area
Solution Approach 2:
The first insulating film with slower etching rate is formed first to create a protective layer that defines the contact hole profile in advance, preventing misalignment issues before the second insulating film is etched
3Manufacturing precision
If the number of masking processes is increased to improve alignment, then manufacturing precision improves, but productivity decreases
Solution Approach 1:
The insulating film is segmented into two layers with different etching characteristics, allowing a single masking process to achieve precise alignment without requiring additional masking steps, thus maintaining high productivity
Solution Approach 2:
The etching parameters are changed by using two insulating films with different etching rates, enabling the formation of an undercut contact hole profile that improves alignment precision while using the same number of masking processes
4Manufacturing precision
If the contact hole is formed with vertical walls, then the fabrication process is simpler, but the aperture ratio is reduced due to disconnection of pixel electrodes
Solution Approach 1:
The contact hole shape changes from vertical walls to an undercut profile with a wider middle section, providing better electrical connection and reducing pixel electrode disconnection while maintaining fabrication simplicity through selective etching
Solution Approach 2:
The first insulating film is formed beforehand to act as a cushioning layer that controls the etching profile, preventing pixel electrode disconnection by creating an undercut shape that provides mechanical and electrical buffer
Data Source
AI summary
An array substrate for a liquid crystal display (LCD) device include: a substrate; a gate line formed in one direction on one surface of the substrate; a data line crossing the gate line to define a pixel area; a thin film transistor (TFT) configured at a crossing of the gate line and the data line; a pixel electrode formed at a pixel region of the substrate; an insulating film formed on the entire surface of the substrate including the pixel electrode and the TFT, including a first insulating film formed of a high temperature silicon nitride film and a second insulating film formed of a low temperature silicon nitride film, and having a contact hole having an undercut shape exposing the pixel electrode; a pixel electrode connection pattern formed within the contact hole having an undercut shape and connected with the pixel electrode and the TFT; and a plurality of common electrodes separately formed on the insulating film.