Underfill Dam Wall Structure for Protecting C2W Die Sensitive Areas

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Solution Overview

Problem

In semiconductor devices, particularly chip-to-wafer (C2W) devices, the sensitive areas of semiconductor die are at risk of contamination and failure due to the underfill material, which is not effectively isolated from these sensitive regions during the manufacturing process.

Innovation Solution

A dam wall structure is formed using rigid material segments, integrated with conductive posts, to block and inhibit the underfill material from reaching the sensitive areas, ensuring protection and maintaining the integrity of the semiconductor device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If underfill material is deposited between semiconductor die and interconnect substrate, then isolation and environmental protection are improved, but sensitive areas become contaminated or covered causing reliability issues

Engineering Contradiction:
Improvedevice reliabilityVSAvoidunderfill material contamination
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the semiconductor die structure by introducing a dam wall that segments the space between the semiconductor die and interconnect substrate. This segmentation creates a protected region around sensitive areas, preventing underfill material from reaching and contaminating these critical regions while still allowing underfill to provide isolation and environmental protection in non-sensitive areas.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dam wall acts as an intermediary structure between the underfill material and the sensitive areas of the semiconductor die. This intermediate element blocks the harmful underfill material from directly contacting sensitive regions, thereby mediating the interaction to prevent contamination while maintaining the beneficial isolation and protection functions of the underfill.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If dam wall is formed to block underfill material, then sensitive area protection is improved, but device complexity increases

Engineering Contradiction:
Improvesensitive area protectionVSAvoidstructure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the dam wall structure with existing conductive posts or support structures on the semiconductor die. By combining the protective dam wall function with already-present structural elements, the design achieves sensitive area protection without adding completely new components, thereby reducing the increase in device complexity that would result from entirely separate protective structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The dam wall structure is designed to serve multiple functions: it acts as a barrier to block underfill material from sensitive areas, provides structural support, and can be integrated with conductive posts that also serve electrical functions. This multi-functionality reduces the need for additional dedicated protective structures, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240021566A1Semiconductor Device and Method of Forming Underfill Dam for Chip-to-Wafer Device
Publication Date: 2024.01.18 STATS CHIPPAC LTD
  • US20240021566A1 patent drawing
  • US20240021566A1 patent drawing
  • US20240021566A1 patent drawing

AI summary

A semiconductor device has a semiconductor die with a sensitive area. A dam wall is formed over the semiconductor die proximate to the sensitive area. In one embodiment, the dam wall has a vertical segment and side wings. The dam wall can have a plurality of rounded segments integrated with a plurality of vertical segments as a unitary body. Alternatively, the dam wall has a plurality of separate vertical segments arranged in two or more overlapping rows. A plurality of conductive posts is formed over the semiconductor die. An electrical component is disposed over the semiconductor die. The semiconductor die and electrical component are disposed over a substrate. An insulating layer is formed over the substrate outside the dam wall. An underfill material is deposited between the semiconductor die and substrate. The dam wall and insulating layer inhibit the underfill material from contacting any portion of the sensitive area.