Insulating Underfill Layout for Low-Inductance Converter Commutation Cells
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Solution Overview
Problem
Aerospace applications require power electronics converters with improved efficiency and power-to-weight ratio, which is limited by the high parasitic inductance in existing power module topologies, leading to increased weight and reduced performance in electrical propulsion systems.
Innovation Solution
A power electronics converter design with a commutation cell featuring reduced parasitic inductance, achieved through a multi-layer planar carrier substrate and optimized electrical connections, allowing for higher switching frequencies and efficiencies up to 99%.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power module topology is used with conventional electrical connections, then device complexity is reduced and ease of manufacture is improved, but parasitic inductance increases leading to reduced efficiency and increased weight
Solution Approach 1:
The patent transitions from conventional three-dimensional wire bonding to a planar two-dimensional electrical connection structure on a multi-layer substrate. This dimensional change reduces the path length and parasitic inductance while maintaining electrical connectivity, directly addressing the contradiction between low loss and simple structure.
Solution Approach 2:
The patent replaces mechanical wire bonding connections with integrated planar electrical traces and conductors on a substrate. This substitution eliminates the mechanical assembly complexity of wire bonding while achieving lower parasitic inductance through optimized electrical path design.
2Productivity
If switching frequency is increased to improve efficiency, then power density increases, but parasitic inductance causes voltage overshoot and limits maximum switching frequency
Solution Approach 1:
The patent optimizes electrical connection parameters including trace width, trace length, conductor material, and layer configuration to minimize parasitic inductance. By changing these electrical parameters, the system can operate at higher switching frequencies without excessive voltage overshoot, resolving the contradiction between productivity and reliability.
3Weight of moving object
If converter efficiency is improved to reduce weight in aerospace applications, then power-to-weight ratio increases, but conventional power module topologies limit further efficiency improvements
Solution Approach 1:
The patent merges the electrical connection structure with the substrate itself, integrating conductors, insulators, and mechanical support into a unified multi-layer planar structure. This consolidation eliminates separate connection components and reduces overall converter weight while achieving lower switching losses through optimized electrical paths.
Data Source
AI summary
A power electronics converter includes a substrate and a converter commutation cell including a power circuit. The power circuit includes at least one power semiconductor switching element and at least one capacitor. Each power semiconductor switching element is comprised in a power semiconductor prepackage. An electrical connection side of the respective power semiconductor prepackage is spaced apart in a z direction from the substrate so as to define a prepackage gap between the substrate and the electrical connection side. At least a portion of the prepackage gap is filled with an electrically insulating material having voids. A converter parameter σ defined as an insulation fill factor divided by a maximum void size is greater than or equal to 10/mm. The insulation fill factor is defined as a cumulated volume of the voids subtracted from a volume of the electrically insulating material divided by the volume of the electrically insulating material.


