Underfill Squeeze-Up Structure for Reliable Semiconductor Stacks
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Solution Overview
Problem
Existing semiconductor device assemblies face challenges with excessive underfill squeeze-out and void traps due to the mismatch in thermal expansion coefficients between semiconductor devices and substrates, leading to mechanical stress and potential electrical defects.
Innovation Solution
The semiconductor device assembly incorporates a design with a stack of semiconductor devices and a substrate, where underfill material is used to fill gaps between devices and the substrate, forming distinct squeeze-out and squeeze-up regions to manage thermal expansion and reduce mechanical stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If underfill material is used to fill gaps between semiconductor devices and substrate, then mechanical stress is reduced and reliability is improved, but excessive squeeze-out and void traps occur due to thermal expansion mismatch
Solution Approach 1:
The underfill material is segmented into distinct regions: a squeeze-out region that accommodates lateral expansion and a squeeze-up region that manages vertical stress. This segmentation allows different portions of the underfill to handle different types of thermal expansion stresses independently, reducing both excessive squeeze-out and void trap formation
Solution Approach 2:
The underfill structure implements local quality by creating regions with different characteristics - the squeeze-out region allows lateral flow while the squeeze-up region provides vertical stress relief. This localized differentiation enables the underfill to address specific stress patterns in different areas, improving overall reliability without causing harmful squeeze-out effects
2Object-affected harmful factors
If conventional packaging processes are used to encapsulate dies, then protection from environmental factors is achieved, but thermal expansion mismatch causes mechanical stress and potential electrical defects
Solution Approach 1:
The underfill material acts as an intermediary between the semiconductor device and substrate, absorbing and distributing thermal expansion stresses. By positioning this compliant material in the gap between rigid components, it mediates the thermal mismatch while maintaining environmental protection through encapsulation
3Reliability
If underfill material is applied to stabilize connections, then electrical defects are prevented, but excessive squeeze-out adds mechanical stress and creates void traps
Solution Approach 1:
The underfill configuration utilizes multiple dimensions by creating both lateral (squeeze-out region) and vertical (squeeze-up region) pathways for stress relief. This dimensional approach allows the underfill to stabilize connections through comprehensive stress management in multiple directions, preventing electrical defects without concentrating mechanical stress in a single location
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces excessive squeeze-out and void traps, enhancing the mechanical stability and reliability of the semiconductor device assembly by minimizing the risk of electrical defects caused by thermal expansion mismatches.
Implementation Method 1
the mismatch in thermal expansion coefficients between semiconductor devices and substrates
Implementation Method 2
underfill material is used to fill gaps between devices and the substrate, forming distinct squeeze-out and squeeze-up regions to manage thermal expansion and reduce mechanical stress
Data Source
AI summary
A semiconductor device assembly is provided. The assembly includes a substrate and a stack of semiconductor devices. The stack of semiconductor devices includes core semiconductor devices and a top semiconductor device disposed at the top of the stack. Each core device has a first thickness. The top device has a second thickness that is greater than the first thickness. Every device in the stack has a gap beneath it, with underfill material filling every gap and covering the sides of the core semiconductor devices. The underfill material has a squeeze-out region protruding away from the stack a first distance, and a squeeze-up region extending up the top semiconductor device a second distance. The second distance measures at least the same as the height of the gap beneath the devices in the stack.


