Early Underflow Detection and Rounding Bypass in Floating-Point Units

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Solution Overview

Problem

Modern processors face challenges in achieving high throughput for complex instructions like floating-point operations, load/store operations, and data moves, which hinder overall performance, especially in applications requiring parallel processing of large data sets.

Innovation Solution

The implementation of an instruction set architecture that includes early underflow detection and rounder bypass mechanisms within the processor's execution units, allowing for optimized execution of floating-point instructions by bypassing unnecessary rounding steps when the result is used as an input for subsequent operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional floating-point execution is used, then correctness is maintained, but throughput is reduced due to necessary rounding steps

Engineering Contradiction:
ImprovethroughputVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary detection of underflow conditions before completing the full floating-point operation. By detecting underflow early in the execution pipeline, the system can bypass subsequent rounding steps that would be unnecessary, thereby reducing latency and improving throughput without sacrificing correctness.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

When underflow is detected, the execution pipeline skips the unnecessary rounding steps and proceeds directly to the final result generation. This rushing through of unnecessary operations eliminates the time penalty associated with traditional complete floating-point execution while maintaining correct results.

Inventive Principle:
Principle #21Skipping (Rushing through)

2Measurement precision

If rounding steps are performed for all floating-point operations, then precision is maintained, but execution time increases

Engineering Contradiction:
ImproveprecisionVSAvoidexecution time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system applies different execution paths based on local conditions. When underflow is detected in specific operations, the rounding steps are omitted for those particular operations. This localized optimization maintains precision where needed while eliminating unnecessary rounding time where underflow occurs.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The execution behavior changes based on the detected underflow condition. By changing the execution parameters (omitting rounding steps when underflow is detected), the system achieves faster execution time while maintaining the necessary precision for valid results.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If complete floating-point operations are executed, then correctness is ensured, but productivity decreases in parallel processing applications

Engineering Contradiction:
ImprovecorrectnessVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary underflow detection before executing the complete floating-point operation. This preliminary action allows the system to identify when full execution is unnecessary, enabling faster throughput in parallel processing while maintaining correctness through early detection and selective bypassing of redundant steps.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The execution pipeline incorporates feedback mechanisms that monitor conditions during floating-point operations. When underflow is detected, the feedback loop triggers a bypass of unnecessary rounding steps, optimizing throughput while ensuring correctness is maintained through proper condition-based control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10157059B2Instruction and logic for early underflow detection and rounder bypass
Publication Date: 2018.12.18 INTEL CORP
  • US10157059B2 patent drawing
  • US10157059B2 patent drawing
  • US10157059B2 patent drawing

AI summary

A processor for floating point underflow detection includes circuitry to decode a first instruction and a floating point unit. The decoded instruction, when executed by the processor, may be for performing a fused multiply-add (FMA) operation. The floating point unit includes circuitry to determine a non-normalized result of the first instruction based on a first input, a second input, and a third input. The floating point unit further includes circuitry to determine whether underflow exists in the non-normalized result based on a first exponent of the first input, a second exponent of the second input, and a third exponent of the third input.