3D NAND Array Undulating Conductive Strips Layout
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Solution Overview
Problem
Current 3D memory structures face challenges in increasing bit density while minimizing the negative impacts that come with it, such as layout overhead and reduced chip yields, due to the large diameter of vertical channel pillars and complex connections.
Innovation Solution
The implementation of a memory device with vertical NAND strings arranged in a tilted grid layout, featuring conductive strips with curved sides for string select lines, word lines, and ground select lines, allowing for a denser packing of NAND strings and reducing the number of string select lines, which enhances data rate and reduces power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical channel pillars with large diameter are used in current 3D memory structures, then manufacturing reliability is improved, but layout overhead increases and chip yields decrease
Solution Approach 1:
The patent applies curvature by forming string select lines with undulating or curved sides instead of straight lines. This curved geometry allows the string select lines to follow the tilted grid arrangement of memory pillars more efficiently, reducing the horizontal space required for each select line and thereby reducing overall layout overhead while maintaining manufacturing reliability
Solution Approach 2:
The patent introduces a tilted grid arrangement where memory pillars are oriented at an angle relative to the substrate plane. This dimensional change from a conventional orthogonal grid to a tilted three-dimensional arrangement allows for more efficient space utilization, reducing the footprint area required for the memory array while maintaining pillar diameter and manufacturing reliability
2Adaptability or versatility
If more string select lines are added to accommodate conventional layouts, then all memory pillars can be accessed, but the number of select lines increases leading to higher power consumption and reduced data rate
Solution Approach 1:
The tilted grid arrangement with curved string select lines enables each select line to serve multiple memory pillars more efficiently. By orienting pillars at an angle and using curved select lines that follow the tilted pattern, a single select line can access multiple pillars along the tilt direction, reducing the total number of select lines required while maintaining full memory access capability
Solution Approach 2:
The patent merges the functions of multiple straight select lines into fewer curved select lines that follow the tilted grid pattern. The undulating shape of the select lines allows them to pass near or intersect multiple pillars in sequence, combining the access function of what would traditionally require multiple separate select lines into a single integrated select line structure
Data Source
AI summary
Area overhead is reduced between adjacent blocks of a 3D vertical channel memory device. In various embodiments, vertically oriented pillars that intersect layers of string select lines and word lines are arranged at intersections of a regular grid that is rotated, in a “twisted” array of pillars. Sides of shapes of the 3D NAND array structure are undulating, and follow undulating lines in which the outer pillars are disposed. For example, any of the string select lines, word lines, ground select lines, and ground lines have sides with undulating shapes.