Uni-Directional Channels With Guaranteed Bandwidth For Multi-Processor Systems

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Solution Overview

Problem

Conventional multiprocessor systems face challenges in optimizing resources and communications for dynamic applications, leading to inefficiencies such as superfluous hardware, high costs, and poor scalability due to inflexible architectures and communication protocols like HyperTransport, MPI, and sockets, which do not guarantee bandwidth or handle changing resource needs effectively.

Innovation Solution

A multi-processor system configuration that uses uni-directional channels with guaranteed bandwidth, implemented through time or spatial division multiplexing, and a package compiler that processes physical and application descriptions to optimize task assignment and communication routing, allowing for dynamic channel creation and booting processes without FLASH memory in all processors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If cache coherency is used to simplify programming model, then ease of operation is improved, but device complexity and cost increase significantly

Engineering Contradiction:
Improveprogramming model simplicityVSAvoidhardware complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent introduces a message passing interface as an intermediary layer between processors and memory systems. This interface provides standardized communication protocols that simplify programming while avoiding the need for complex cache coherency hardware. The message passing mechanism acts as a mediator that handles data transfer and synchronization without requiring intricate cache management logic in each processor.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical/cache-based coherency system with a software-based message passing system. Instead of relying on hardware cache coherency protocols that require complex inter-processor communication logic, the system uses standardized message passing interfaces that can be implemented through software layers, thereby reducing hardware complexity while maintaining programming simplicity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If message passing is used to achieve scalability, then adaptability is improved, but ease of operation deteriorates due to new programming model requirements

Engineering Contradiction:
ImprovescalabilityVSAvoidprogramming model complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent implements a universal message passing interface that can be used across different processor architectures and configurations. This interface provides multi-functional capabilities including data transfer, synchronization, and communication coordination through standardized protocols. By making the message passing mechanism universal and architecture-independent, the system achieves scalability without requiring application-specific programming models, as the same interface works across diverse hardware configurations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If general purpose processing systems are used to run variety of applications, then adaptability is improved, but device complexity and cost increase

Engineering Contradiction:
Improveapplication compatibilityVSAvoidsystem complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic configuration capabilities where the multiprocessor system can be reconfigured at runtime based on application requirements. The message passing interface and communication channels can be dynamically created, modified, and destroyed without requiring system reconfiguration or additional hardware. This dynamic adaptability allows the system to optimize its structure for specific applications while maintaining general-purpose capabilities, reducing the need for fixed complex hardware architectures designed to handle all possible application scenarios.

Inventive Principle:
Principle #15Dynamics

4Speed

If HyperTransport or similar protocols are used for high-performance communication, then speed is improved, but device complexity and cost increase

Engineering Contradiction:
Improvecommunication speedVSAvoidprotocol complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent uses standardized message passing interface specifications that can be copied and implemented across different hardware platforms. Rather than requiring proprietary high-speed protocols like HyperTransport, the system implements standardized communication interfaces that can be replicated and adapted to various hardware configurations. This approach maintains communication speed by using optimized standardized protocols while avoiding the complexity and cost of proprietary high-performance protocol implementations.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS8001266B1Configuring a multi-processor system
Publication Date: 2011.08.16 XILINX INC
  • US8001266B1 patent drawing
  • US8001266B1 patent drawing
  • US8001266B1 patent drawing

AI summary

A source processing node communicates with a destination processing node though a channel that has bandwidth requirements and is uni-directional. The source processing node generates the channel to the destination processing node. The destination processing node then accepts the channel. The source processing node allocates a transmit buffer for the channel. The destination processing node also allocates a receive buffer for the channel. A source processing element writes data to the transmit buffer for the channel. A source network interface transmits the data from the transmit buffer of the source processing node over the channel. A destination network interface receives the data into the receive buffer for the channel. A destination processing element receives the data from the receive buffer.