Unidirectional Clock Synchronization via Delay Noise Filtering

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Solution Overview

Problem

Standard time synchronization protocols in packet transfer networks, such as IEEE 1588, are inaccurate and slow, with poor tolerance for packet delay variation (PDV), leading to long synchronization times and frequency synchronization issues.

Innovation Solution

A method that selects consecutive intervals of time-stamped packets with delay noise within a defined acceptance window to determine a correction factor for synchronizing clocks, allowing for faster and more accurate synchronization while tolerating high orders of magnitude packet delay variation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If bidirectional transmission protocols (IEEE 1588) are used for clock synchronization, then time difference correction can be achieved, but synchronization time increases and accuracy decreases

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsynchronization time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent inverts the traditional bidirectional synchronization approach by using unidirectional transmission only. Instead of having clocks exchange timing messages bidirectionally to measure round-trip delay, the master clock sends timing messages unidirectionally to the slave clock, which measures one-way delay and applies correction locally. This inversion eliminates the need for reverse message transmission, thereby reducing synchronization time while maintaining or improving accuracy.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent extracts and eliminates the delay response message transmission phase from the synchronization protocol. By removing the bidirectional delay measurement exchange and keeping only the essential unidirectional timing message transmission from master to slave, the protocol achieves faster synchronization without the overhead of round-trip communication, directly addressing the time loss issue.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If standard time synchronization protocols are used, then clock synchronization can be achieved, but tolerance for packet delay variation (PDV) is poor

Engineering Contradiction:
ImprovePDV toleranceVSAvoidsynchronization accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent changes the fundamental parameter of message transmission direction from bidirectional to unidirectional. This parameter change makes the synchronization process inherently more tolerant of PDV because it eliminates the return path where additional variable delays occur. The one-way timing messages are less susceptible to network variability, thereby improving reliability under high PDV conditions while maintaining synchronization accuracy through appropriate filtering and correction mechanisms.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic filtering mechanisms that adapt to varying PDV conditions. The slave clock dynamically adjusts its processing of received timing messages, applying appropriate filtering and correction based on the observed delay characteristics. This dynamic adaptation allows the system to maintain accuracy even when PDV levels change, improving overall reliability in variable network conditions.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If bidirectional message transmittal is used for synchronization, then offset measurement can be performed, but the process becomes slower and less accurate

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsynchronization speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent inverts the synchronization message flow by eliminating the return message transmission. Instead of master sending timing messages and slave sending delay responses, the system only has master-to-slave unidirectional transmission. This inversion drastically reduces the number of message exchanges required, thereby increasing synchronization speed while the slave clock performs local calculations to maintain measurement accuracy.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent skips the delay response transmission step entirely, rushing through the synchronization process with only the essential timing message delivery. By skipping the return message exchange that slows down the process, the system achieves faster synchronization cycles while the slave clock compensates by performing the necessary delay calculations locally based on received timestamps and its own clock readings.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS7839897B2Methods and apparatus for unidirectional timing message transport over packet networks
Publication Date: 2010.11.23 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US7839897B2 patent drawing
  • US7839897B2 patent drawing
  • US7839897B2 patent drawing

AI summary

Methods and apparatus for synchronizing a first clock of a transmit node and a second clock of receive node in a packet network are provided. Consecutive intervals of time-stamped packets transferred from the transmit node to the receive node are selected. The consecutive intervals have a difference in delay noise within a defined acceptance window. A correction factor is determined for the second clock in accordance with transmit and receive time stamps of transferred time-stamped packets bounding the consecutive intervals. The correction factor is applied to the second clock to synchronize the second clock of the receive node with the first clock of the transmit node.