Unified Adapter Layer Protocol Conversion Bridge

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Solution Overview

Problem

Current MIPI Alliance applications require multiple discrete components or bridge chips to convert various protocols, leading to inefficiencies due to two levels of external bridges, which introduce speed mismatches between high-speed and low-speed upstream and downstream data transfers.

Innovation Solution

A unified adapter layer is introduced in a bridge system that decodes host data packets to generate data elements, which are then processed and transmitted using specific device protocols, eliminating the need for multiple bridges by handling multiple protocols within a single adapter layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple discrete bridge chips are used to convert various protocols, then protocol compatibility is improved, but device complexity and hardware requirements increase

Engineering Contradiction:
Improveprotocol compatibilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple discrete bridge chips into a single unified adapter layer that handles multiple protocol conversions (I3C, I3S, CSI-2, DSI) simultaneously. This consolidation reduces the number of external components while maintaining comprehensive protocol compatibility through a centralized conversion architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified adapter layer is designed to perform multiple protocol conversion functions within a single component. It can convert between A-PHY and various device protocols (I3C for sensors, I3S for audio, CSI-2 for cameras, DSI for displays), making the bridge chip universal and eliminating the need for multiple specialized bridge chips.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If two levels of external bridges are used for protocol conversion, then protocol isolation is improved, but data transfer speed and efficiency deteriorate due to speed mismatches

Engineering Contradiction:
Improveprotocol isolationVSAvoiddata transfer speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent merges the two-level bridge structure into a single-level unified adapter layer that directly converts between host protocol and device protocols. This eliminates the intermediate conversion stage that caused speed mismatches, allowing high-speed data transfer while maintaining protocol isolation through direct dedicated conversion paths.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple discrete bridge chips are used, then protocol conversion capability is improved, but hardware cost and pin count increase

Engineering Contradiction:
Improveprotocol conversion capabilityVSAvoidhardware components
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent consolidates multiple discrete bridge chips into a single unified adapter layer, reducing the quantity of external hardware components. This single component provides comprehensive protocol conversion capability for sensors, audio, camera, and display interfaces, eliminating the need for multiple separate chips and reducing overall hardware cost.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The unified adapter layer serves as a universal bridge that handles multiple protocol conversions (I3C, I3S, CSI-2, DSI) within a single component, replacing what would traditionally require multiple specialized bridge chips. This multi-functionality reduces both the number of components and the associated pin count requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20220006883A1System, apparatus, and method for packet-based network transport including a unified adapter layer
Publication Date: 2022.01.06 INTEL CORP
  • US20220006883A1 patent drawing
  • US20220006883A1 patent drawing
  • US20220006883A1 patent drawing

AI summary

In one embodiment, an apparatus includes a unified adapter layer and a first bus controller. The unified adapter layer is to receive a first host data packet packetized in accordance with a host protocol and directed to a first device and decode the first host data packet to generate first and second data elements based on the first host data packet, the first device associated with a first device protocol. The first bus controller is coupled to the unified adapter layer and is to be coupled to the first device via a first bus. The first bus controller is to packetize the first data element in accordance with the first device protocol to generate a first device data packet for transmission to the first device in accordance with the first device protocol via the first bus and adjust a bus controller parameter based in part on the second data element. Other embodiments are described and claimed.