Memory Management for Unified CPU and Accelerator Buffers

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Solution Overview

Problem

In modern computing systems, managing memory access across different types of buffers, such as CPU and DMA buffers, is complex due to inconsistent access mechanisms and security concerns, increasing programming complexity and reducing software portability.

Innovation Solution

A memory management device and method that provides a unified approach for allocating and resolving memory addresses using a processor and a structured data organization like a red-black tree, enabling efficient memory allocation and access control across heterogeneous devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If different access mechanisms are used for CPU buffer and DMA buffer, then each buffer type can be optimized for its specific access pattern, but memory management complexity increases and software portability decreases

Engineering Contradiction:
Improvebuffer access optimizationVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a memory management unit (MMU) as an intermediary between the application and different buffer types. The MMU maintains a buffer descriptor table that maps virtual buffer addresses to physical buffer locations, translating uniform application requests into device-specific access patterns. This mediator layer preserves buffer optimization while hiding complexity from software developers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a universal buffer access interface that works with both CPU buffers and DMA buffers through a common API. The system provides unified buffer allocation, address translation, and access control functions that operate consistently across different buffer types, eliminating the need for device-specific code paths.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If direct memory access is allowed from application space to device buffers, then access speed improves, but security vulnerabilities and system failures may occur

Engineering Contradiction:
Improvememory access speedVSAvoidsystem security
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces a memory management unit (MMU) as an intermediary between the application and different buffer types. The MMU maintains a buffer descriptor table that maps virtual buffer addresses to physical buffer locations, translating uniform application requests into device-specific access patterns. This mediator layer preserves buffer optimization while hiding complexity from software developers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements access validation feedback mechanisms where the memory management unit checks each buffer access request against security policies and buffer descriptors. The MMU provides feedback by allowing or blocking access based on validation results, preventing unauthorized memory operations while maintaining legitimate high-speed access paths.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250291802A1Memory management device and memory management method
Publication Date: 2025.09.18 MEDIATEK INC
  • US20250291802A1 patent drawing
  • US20250291802A1 patent drawing
  • US20250291802A1 patent drawing

AI summary

A memory management method is provided. The method includes a memory allocation stage and an address resolution stage. The memory allocation stage includes receiving a memory allocation request from the application program, allocating a buffer with the specified size in the memory in response to the memory allocation request, and generating a buffer pointer for the buffer, and return the buffer pointer to the application program. The buffer is a device buffer is allocated for one or more accelerator devices, or a CPU buffer allocated for a CPU. The address resolution stage includes receiving a memory access request from the application program, determining whether the search pointer corresponds to the device buffer or the CPU buffer based on the buffer pointer and the specified size, allowing access to the corresponding device buffer or CPU buffer.