Unified Bus Architecture for Voltage Regulator Protocol Adaptation
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Solution Overview
Problem
Existing voltage regulators are limited to supporting a single type of processing unit and protocol for high-speed serial interfaces, failing to adapt to updates or customizations, which restricts their usage across various application segments and increases development complexity and cost.
Innovation Solution
A voltage regulator design that includes a processor, logic block, and register bank, capable of decoding and responding to multiple industry standard protocols such as SVID and SVI, allowing for dynamic configuration and support of custom commands and updates through a unified bus architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a voltage regulator is designed for a single standard protocol for high speed serial interface based on processing unit compatibility, then the voltage regulator can reliably communicate with the intended processing unit, but the usage of the voltage regulator is severely limited and it cannot adapt to changes in protocol specifications or support multiple application segments
Solution Approach 1:
The voltage regulator is designed with a universal interface that can support multiple high-speed serial interface protocols (SVID, SVI, AVS, and custom protocols) through a single device. The regulator includes configurable logic blocks and register banks that can be programmed to recognize and respond to different protocol types, allowing one voltage regulator to replace multiple protocol-specific regulators across various application segments including servers, storage, communication, automotive, PCs, and gaming systems
Solution Approach 2:
The voltage regulator employs dynamic configuration capabilities where the interface can be reprogrammed at runtime to adapt to different protocols. The device includes state machines and logic blocks that can be dynamically configured through register banks to handle protocol transitions, command format changes, and register structure modifications, enabling the regulator to switch between different protocol specifications as needed
2Ease of manufacture
If the voltage regulator follows a fixed protocol specification, then the device structure can be simplified and manufacturing can be easier, but the voltage regulator cannot respond to modifications in protocol specifications such as changes to commands, registers, or addition of new commands and registers
Solution Approach 1:
The voltage regulator includes pre-configurable logic blocks and register banks that are designed to accommodate future protocol extensions. The device incorporates预留 (reserved) register addresses and configurable parameter fields that can be programmed in advance to support new commands, registers, or protocol modifications without requiring hardware changes, allowing the regulator to adapt to specification updates while maintaining a relatively simple fixed hardware structure
Solution Approach 2:
The voltage regulator uses programmable parameters and configurable registers that can be modified through software to adapt to protocol specification changes. Key parameters such as command formats, register structures, data widths, and timing characteristics can be dynamically adjusted through the register bank interface, allowing the same hardware implementation to support multiple protocol versions and customizations
3Reliability
If separate voltage regulators are designed for different protocols and application segments, then each regulator can be optimized for its specific protocol, but the development complexity and cost increase significantly
Solution Approach 1:
The patent merges multiple protocol-specific voltage regulator functions into a single unified device. The voltage regulator integrates support for SVID, SVI, AVS, and custom protocols within one chip, combining what would traditionally require separate dedicated regulators for each protocol and application segment. This consolidation reduces the total number of devices needed and simplifies the development process while maintaining protocol-specific optimization through software configuration
Data Source
AI summary
In described examples, a voltage regulator includes a processor. A register bank is coupled to the processor. A logic block is coupled to the processor and to the register bank. The logic block receives frames. The processor programs the logic block and the register bank based on at least one of the frames.