Unified Cache Allocation for Speculative Execution Security
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Solution Overview
Problem
Current cache architectures struggle to efficiently manage speculative and non-speculative executions, leading to inefficiencies in resource allocation and security concerns due to the lack of dynamic configuration of cache resources between these execution types.
Innovation Solution
The implementation of a cache system that allows for the dynamic configuration of cache resources, enabling interchangeable cache sets for both speculative and non-speculative executions, using a unified set of cache resources that can be allocated as either a shadow cache or a main cache, with mechanisms for synchronization and execution-type signaling to optimize performance and security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate cache structures are used for speculative and non-speculative executions, then security is improved, but device complexity and resource allocation efficiency worsen
Solution Approach 1:
The patent merges speculative and non-speculative cache operations into a unified cache structure, where the same cache sets are dynamically allocated to different execution types based on current operational needs. This eliminates the need for physically separate cache structures while maintaining security through controlled allocation mechanisms.
Solution Approach 2:
The patent implements dynamic cache allocation where cache sets can be reassigned between speculative and non-speculative executions based on runtime conditions. The cache structure transitions from static assignment to dynamic reconfiguration, allowing the system to adapt cache resource distribution without increasing structural complexity.
2Reliability
If dedicated cache resources are allocated for speculative execution, then execution security is improved, but cache efficiency and resource utilization worsen
Solution Approach 1:
The patent makes cache sets universal by enabling them to serve both speculative and non-speculative execution types. Each cache set can be dynamically assigned to different execution types based on current needs, allowing the same physical cache resources to fulfill multiple functional roles and improving overall utilization efficiency.
Solution Approach 2:
The patent changes the allocation parameter of cache sets from fixed dedication to dynamic reassignment. By modifying how cache resources are distributed (from static to dynamic allocation), the system maintains security requirements while significantly improving cache efficiency and preventing resource waste.
3Productivity
If cache sets are dynamically reconfigured between execution types, then resource utilization is improved, but synchronization complexity and overhead increase
Solution Approach 1:
The patent implements a mechanism where cache sets are discarded from their current execution type assignment and recovered for reuse with a different execution type. When a cache set is no longer needed for its current purpose, it is invalidated and made available for reallocation, enabling efficient resource turnover without requiring complex inter-cache synchronization.
Solution Approach 2:
The patent extracts the synchronization requirement from the cache reconfiguration process by using invalidation signals rather than complex coordination protocols. Instead of synchronizing multiple caches, the system extracts and manages cache set assignments through a centralized control mechanism that signals invalidation and reallocation events.
4Stability of the object's composition
If extensive synchronization mechanisms are implemented for cache sharing, then data consistency is improved, but execution performance and security worsen
Solution Approach 1:
The patent implements self-service cache management where the cache coherence system automatically handles consistency maintenance through invalidation signals. Instead of requiring extensive external synchronization mechanisms, the cache structure serves itself by automatically invalidating and reallocating cache sets based on execution type changes, maintaining data consistency without performance overhead.
Data Source
AI summary
A cache system, having: a first cache; a second cache; a configurable data bit; and a logic circuit coupled to a processor to control the caches based on the configurable bit. When the configurable bit is in a first state, the logic circuit is configured to: implement commands for accessing a memory system via the first cache, when an execution type is a first type; and implement commands for accessing the memory system via the second cache, when the execution type is a second type. When the configurable data bit is in a second state, the logic circuit is configured to: implement commands for accessing the memory system via the second cache, when the execution type is the first type; and implement commands for accessing the memory system via the first cache, when the execution type is the second type.