Unified Conveyance Containers for Semiconductor Wafer and Chip Packaging
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Solution Overview
Problem
Existing semiconductor manufacturing systems lack integration of steps from wafer-based semiconductor manufacturing to packaging, with no effective linkage between preceding and subsequent steps, and conveyance systems are not easily connected.
Innovation Solution
A semiconductor manufacturing system is designed with a semiconductor chip manufacturing device and a packaging device, both utilizing conveyance containers with unified shapes and mechanisms for seamless loading and unloading of wafers and substrates, allowing for easy linking of manufacturing steps from wafer processing to packaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate conveyance systems are used for preceding steps (wafer manufacturing) and subsequent steps (packaging), then each system can be optimized for its specific function, but the linkage between preceding and subsequent steps becomes difficult and complex
Solution Approach 1:
The conveyance container is designed with a standardized configuration that enables it to serve multiple functions: housing wafers during manufacturing in the preceding steps, and subsequently housing semiconductor chips for packaging in the subsequent steps. This universal container design allows a single conveyance system to handle both wafer processing and chip packaging operations, eliminating the need for separate optimized systems while maintaining functional effectiveness throughout the entire manufacturing flow.
2Ease of manufacture
If different conveyance containers are used for wafers and substrates, then each container can be optimized for its specific load, but the loading and unloading mechanisms become more complex and less unified
Solution Approach 1:
A single standardized conveyance container design is employed for both wafer processing and substrate packaging operations. The container maintains a consistent structure, including uniform opening dimensions and standardized holding sections, allowing the same loading and unloading mechanism to handle both wafers and substrates without requiring separate optimized container designs. This universality simplifies the loading mechanism while still accommodating different workpiece types.
Solution Approach 2:
While the overall container structure remains standardized for universality, the holding section inside the container is specifically adapted to the local requirement of securing the workpiece. The holding section can be configured to appropriately secure either wafers or substrates within the standardized container body, maintaining both universal compatibility and local optimization for specific loads.
3Productivity
If the conveyance container structure is highly specialized for wafer handling, then wafer processing efficiency is maximized, but adaptation for chip packaging becomes difficult
Solution Approach 1:
The conveyance container employs a standardized structure with consistent opening dimensions, body shape, and holding section configuration that enables it to efficiently handle both wafers during manufacturing and chips during packaging. This universal design maintains productivity by allowing rapid loading and unloading operations for both workpiece types while achieving adaptability across different manufacturing stages from wafer fabrication through chip packaging.
Data Source
AI summary
A semiconductor manufacturing system has a series of steps, from manufacturing of a semiconductor on a wafer until packaging, that can be easily linked. A semiconductor chip manufacturing device manufactures a semiconductor chip, and a semiconductor packaging device packages the semiconductor chip by attaching the semiconductor chip to a package substrate which is larger than the wafer. The semiconductor chip manufacturing device includes a PLAD system for loading the wafer into and out of the semiconductor chip manufacturing device through a shuttle which is capable of housing the wafer. The semiconductor packaging device includes a PLAD system capable of loading the package substrate into and out of the semiconductor packaging device through a shuttle which is capable of housing the package substrate. The shuttles have container bodies of a same shape.


