Unified CPU/APD Architecture for Task Scheduling and Topology Discovery
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Solution Overview
Problem
Current computer systems face challenges in efficiently scheduling and distributing computational tasks between CPUs and GPUs due to constrained programming environments, separate memory systems, high overhead in dispatching work to GPUs, and limited support for system-software-driven process management, leading to suboptimal performance and resource utilization.
Innovation Solution
A combined CPU/APD architecture that unifies CPUs and accelerated processing devices (APDs) in a flexible computing environment, enabling efficient discovery and reporting of device properties and system topology to facilitate seamless task scheduling and distribution across computational resources, implemented in a single integrated circuit with CPU and APD cores, memory management, and I/O memory management circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If computational commands are dispatched to GPU for execution, then processing throughput is improved, but latency increases due to high overhead and command queuing
Solution Approach 1:
The system segments computational commands into different types (graphics commands vs. computational commands) and routes them to appropriate processing units. Graphics commands are dispatched to GPU while computational commands are executed by CPU, avoiding the latency penalty of queuing computational commands in GPU command queues.
Solution Approach 2:
A command processor is introduced as an intermediary component that sits between the CPU and GPU. This command processor receives commands from the CPU, determines whether they are graphics or computational commands, and routes them appropriately. This intermediary enables fine-grained command-level scheduling and reduces latency by preventing computational commands from waiting in GPU queues.
2Reliability
If separate memory systems are used for CPU and GPU, then each processor has dedicated memory resources, but memory access overhead increases and power consumption rises
Solution Approach 1:
The system merges the previously separate CPU and GPU memory systems into a unified memory architecture. This unified memory system allows both CPU and GPU to access the same memory pool, eliminating the need for expensive chip-to-chip memory interfaces and reducing power consumption while maintaining reliable memory resources for both processors.
3Adaptability or versatility
If discrete chip arrangement is used for CPU and GPU, then each processor has independent architecture, but system complexity increases and communication overhead rises
Solution Approach 1:
The system implements a universal command processor that can handle both graphics commands and computational commands, serving multiple functions with a single component. This multi-functional approach reduces system complexity compared to having separate processing paths while maintaining the adaptability of independent CPU and GPU architectures through the unified memory system.
Data Source
AI summary
Methods and apparatus are provided, as an aspect of a combined CPU/APD architecture system, for discovering and reporting properties of devices and system topology that are relevant to efficiently scheduling and distributing computational tasks to the various computational resources of a combined CPU/APD architecture system. The combined CPU/APD architecture unifies CPUs and APDs in a flexible computing environment. In some embodiments, the combined CPU/APD architecture capabilities are implemented in a single integrated circuit, elements of which can include one or more CPU cores and one or more APD cores. The combined CPU/APD architecture creates a foundation upon which existing and new programming frameworks, languages, and tools can be constructed.