Unified Data Reading Circuit for Multi-Model AI Chips
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Solution Overview
Problem
Existing artificial intelligence models, such as convolutional neural network (CNN), attention-based deep learning model Transformer, and sparse Transformer, require separate circuits for data reading, leading to increased chip complexity and area due to different data reading methods.
Innovation Solution
A data reading method and device utilizing loop counting structures that are reused across different models, determining a data reading mode, obtaining order, and using corresponding loop counting structures to sequentially count and locate data positions, reducing the need for multiple dedicated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If separate circuits are set up for different AI models to read data, then each model can have optimized data reading performance, but chip complexity and area increase
Solution Approach 1:
The patent applies universality by designing a unified data reading circuit that can handle multiple AI models (CNN, Transformer, sparse Transformer) through a single standardized interface. The system uses a standardized data layout (NHWC format) and unified addressing mechanism that allows one circuit design to serve multiple model types, eliminating the need for separate dedicated circuits for each model architecture.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting reading parameters such as block size, tile size, and stride based on the specific model requirements. The unified circuit can adapt to different models by changing operational parameters rather than requiring different hardware structures, allowing flexible support for various data reading patterns through parameter configuration.
2Productivity
If separate circuits are set up for different AI models to read data, then each model can have optimized data reading performance, but chip area increases
Solution Approach 1:
The patent applies universality by designing a unified data reading circuit that can handle multiple AI models (CNN, Transformer, sparse Transformer) through a single standardized interface. The system uses a standardized data layout (NHWC format) and unified addressing mechanism that allows one circuit design to serve multiple model types, eliminating the need for separate dedicated circuits for each model architecture.
Solution Approach 2:
The patent merges multiple model-specific data reading functions into a single unified circuit. By combining the data reading capabilities for CNN, Transformer, and sparse Transformer into one shared hardware structure with standardized addressing and control logic, the patent reduces the total chip area required compared to having separate circuits for each model.
3Reliability
If multiple dedicated circuits are created for different data reading modes, then data reading accuracy is maintained, but hardware design complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the data array into standardized blocks and tiles with consistent formatting (NHWC layout). This segmentation approach allows the unified circuit to handle different model requirements by processing standardized units, maintaining reading accuracy through systematic data organization while simplifying the control logic compared to model-specific circuits.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting reading parameters such as block size, tile size, and stride based on the specific model requirements. The unified circuit can adapt to different models by changing operational parameters rather than requiring different hardware structures, allowing flexible support for various data reading patterns through parameter configuration.
Data Source
AI summary
A data reading method includes determining a data reading mode for a data array, determining, based on the data reading mode, an obtaining order for obtaining data in different directions in the data array, and a plurality of loop counting structures for obtaining the data in the different directions, and performing, according to the obtaining order, counting sequentially through corresponding ones of the loop counting structures. A position of target data in the data array is determined based on counting of the loop counting structures.