Unified DRAM Protocol for ECC and Non-ECC Memory
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current DRAM protocols require different architectures for ECC and non-ECC DRAMs, leading to increased costs due to the need for distinct protocols and architectural changes, which complicates the inclusion of error correction code information.
Innovation Solution
A method and system that allows for the transfer of data using a unified protocol, where ECC bits replace data mask bits in an additional frame for ECC DRAMs, maintaining the general protocol format and frame size, and optionally includes a data mask frame for non-ECC DRAMs, enabling the use of a single architecture for both types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different protocols are implemented for ECC and non-ECC DRAMs, then error correction capability is improved, but device complexity and cost increase
Solution Approach 1:
The patent applies universality by designing a single unified protocol that can serve both ECC and non-ECC DRAM types. The protocol uses a common frame structure where the data mask frame can be interpreted differently: for non-ECC DRAMs it contains data mask bits, and for ECC DRAMs it contains ECC bits. This multi-functional approach eliminates the need for separate protocols while maintaining error correction capability when needed.
Solution Approach 2:
The patent utilizes parameter changes by modifying the interpretation of existing protocol parameters rather than changing the protocol structure itself. Specifically, the same data mask frame parameter is changed in meaning based on the memory type: in non-ECC mode it provides data mask information, while in ECC mode it provides error correction bits. This allows the protocol to adapt to different memory types through parameter reinterpretation rather than architectural changes.
2Reliability
If the protocol is changed to include ECC information, then error correction capability is improved, but manufacturing cost increases
Solution Approach 1:
The unified protocol serves both ECC and non-ECC DRAMs with a single implementation, eliminating the need for manufacturers to produce and support multiple protocol versions. This reduces manufacturing complexity and cost while still providing error correction capability for ECC memory types through the same protocol infrastructure.
Solution Approach 2:
By changing the parameter interpretation rather than the protocol structure, the system avoids costly hardware redesigns. The same physical and logical infrastructure handles both ECC and non-ECC modes through software/firmware parameter configuration, significantly reducing manufacturing costs compared to dedicated protocol implementations.
3Device complexity
If a unified protocol is used for both ECC and non-ECC DRAMs, then device complexity is reduced, but reliability may be compromised
Solution Approach 1:
The system maintains reliability by properly configuring parameters based on memory type. When ECC DRAMs are detected, the protocol automatically switches to interpreting the data mask frame as ECC bits rather than data mask information. This parameter adaptation ensures that error correction functionality is activated only when needed, maintaining reliability without compromising the simplified unified protocol architecture.
Solution Approach 2:
The system incorporates feedback mechanisms to detect the memory type (ECC or non-ECC) and adjust protocol parameter interpretation accordingly. This feedback loop ensures that the unified protocol correctly identifies and responds to the appropriate memory type, maintaining error correction capability while using a single simplified architecture.
Data Source
AI summary
A method for transferring data into a data memory using a data protocol is presented. The data memory is an error correction code (ECC) memory or a non-error correction code memory. The data protocol has different frames. When data are written into an ECC memory, the protocol includes a data mask frame in which the data mask bits are replaced by ECC bits. The method is designed such that ECC and non-ECC DRAMs can be established with the same protocol and at least a similar architecture.